diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2010-02-26 14:04:15 -0500 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-02-26 14:06:24 -0500 |
commit | a7790532f5b7358c33a6b1834dc2b318de209f31 (patch) | |
tree | 0ceb9e24b3f54cb5c8453fb5a218e2a94a0f1cce /arch/arm/mach-mx25 | |
parent | 2764fb4244cc1bc08df3667924ca4a972e90ac70 (diff) | |
parent | 60b341b778cc2929df16c0a504c91621b3c6a4ad (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
The SmartMedia FTL code depends on new kfifo bits from 2.6.33
Diffstat (limited to 'arch/arm/mach-mx25')
-rw-r--r-- | arch/arm/mach-mx25/clock.c | 58 | ||||
-rw-r--r-- | arch/arm/mach-mx25/devices.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-mx25/devices.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mx25/mx25pdk.c | 48 |
4 files changed, 103 insertions, 23 deletions
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index ef26951a5275..6acc88bcdc40 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c | |||
@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk) | |||
119 | return get_rate_per(8); | 119 | return get_rate_per(8); |
120 | } | 120 | } |
121 | 121 | ||
122 | static unsigned long get_rate_gpt(struct clk *clk) | ||
123 | { | ||
124 | return get_rate_per(5); | ||
125 | } | ||
126 | |||
122 | static unsigned long get_rate_otg(struct clk *clk) | 127 | static unsigned long get_rate_otg(struct clk *clk) |
123 | { | 128 | { |
124 | return 48000000; /* FIXME */ | 129 | return 48000000; /* FIXME */ |
@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk) | |||
144 | __raw_writel(reg, clk->enable_reg); | 149 | __raw_writel(reg, clk->enable_reg); |
145 | } | 150 | } |
146 | 151 | ||
147 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | 152 | #define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \ |
148 | static struct clk name = { \ | 153 | static struct clk name = { \ |
149 | .id = i, \ | 154 | .id = i, \ |
150 | .enable_reg = CRM_BASE + er, \ | 155 | .enable_reg = CRM_BASE + er, \ |
@@ -153,26 +158,30 @@ static void clk_cgcr_disable(struct clk *clk) | |||
153 | .set_rate = sr, \ | 158 | .set_rate = sr, \ |
154 | .enable = clk_cgcr_enable, \ | 159 | .enable = clk_cgcr_enable, \ |
155 | .disable = clk_cgcr_disable, \ | 160 | .disable = clk_cgcr_disable, \ |
161 | .secondary = s, \ | ||
156 | } | 162 | } |
157 | 163 | ||
158 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL); | 164 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL); |
159 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL); | 165 | DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL); |
160 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL); | 166 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); |
161 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL); | 167 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); |
162 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL); | 168 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); |
163 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL); | 169 | DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); |
164 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL); | 170 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk); |
165 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL); | 171 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk); |
166 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL); | 172 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk); |
167 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL); | 173 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk); |
168 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL); | 174 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk); |
169 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL); | 175 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL); |
170 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL); | 176 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL); |
171 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL); | 177 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL); |
172 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL); | 178 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL); |
173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); | 179 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL); |
174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); | 180 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL); |
175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); | 181 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL); |
182 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL); | ||
183 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL); | ||
184 | DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk); | ||
176 | 185 | ||
177 | #define _REGISTER_CLOCK(d, n, c) \ | 186 | #define _REGISTER_CLOCK(d, n, c) \ |
178 | { \ | 187 | { \ |
@@ -204,15 +213,24 @@ static struct clk_lookup lookups[] = { | |||
204 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) | 213 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) |
205 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) | 214 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) |
206 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) | 215 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) |
216 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | ||
207 | }; | 217 | }; |
208 | 218 | ||
209 | int __init mx25_clocks_init(unsigned long fref) | 219 | int __init mx25_clocks_init(void) |
210 | { | 220 | { |
211 | int i; | 221 | int i; |
212 | 222 | ||
213 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 223 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
214 | clkdev_add(&lookups[i]); | 224 | clkdev_add(&lookups[i]); |
215 | 225 | ||
226 | /* Turn off all clocks except the ones we need to survive, namely: | ||
227 | * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM, | ||
228 | * SCC | ||
229 | */ | ||
230 | __raw_writel((1 << 19), CRM_BASE + CCM_CGCR0); | ||
231 | __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1); | ||
232 | __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2); | ||
233 | |||
216 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 234 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |
217 | 235 | ||
218 | return 0; | 236 | return 0; |
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 63511de3a559..9fdeea1c083b 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c | |||
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void) | |||
419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | 419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); |
420 | } | 420 | } |
421 | 421 | ||
422 | static struct resource mx25_fec_resources[] = { | ||
423 | { | ||
424 | .start = MX25_FEC_BASE_ADDR, | ||
425 | .end = MX25_FEC_BASE_ADDR + 0xfff, | ||
426 | .flags = IORESOURCE_MEM, | ||
427 | }, | ||
428 | { | ||
429 | .start = MX25_INT_FEC, | ||
430 | .end = MX25_INT_FEC, | ||
431 | .flags = IORESOURCE_IRQ, | ||
432 | }, | ||
433 | }; | ||
434 | |||
435 | struct platform_device mx25_fec_device = { | ||
436 | .name = "fec", | ||
437 | .id = 0, | ||
438 | .num_resources = ARRAY_SIZE(mx25_fec_resources), | ||
439 | .resource = mx25_fec_resources, | ||
440 | }; | ||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index fe6bf88ad1dd..fe5420fcd11f 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h | |||
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device; | |||
17 | extern struct platform_device mxc_i2c_device0; | 17 | extern struct platform_device mxc_i2c_device0; |
18 | extern struct platform_device mxc_i2c_device1; | 18 | extern struct platform_device mxc_i2c_device1; |
19 | extern struct platform_device mxc_i2c_device2; | 19 | extern struct platform_device mxc_i2c_device2; |
20 | extern struct platform_device mx25_fec_device; | ||
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c index d23ae571c03f..6f06089246eb 100644 --- a/arch/arm/mach-mx25/mx25pdk.c +++ b/arch/arm/mach-mx25/mx25pdk.c | |||
@@ -18,10 +18,11 @@ | |||
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/types.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/delay.h> | ||
21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
22 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
24 | #include <linux/smsc911x.h> | 25 | #include <linux/fec.h> |
25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
26 | 27 | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -35,21 +36,62 @@ | |||
35 | #include <mach/mx25.h> | 36 | #include <mach/mx25.h> |
36 | #include <mach/mxc_nand.h> | 37 | #include <mach/mxc_nand.h> |
37 | #include "devices.h" | 38 | #include "devices.h" |
38 | #include <mach/iomux-v3.h> | 39 | #include <mach/iomux.h> |
39 | 40 | ||
40 | static struct imxuart_platform_data uart_pdata = { | 41 | static struct imxuart_platform_data uart_pdata = { |
41 | .flags = IMXUART_HAVE_RTSCTS, | 42 | .flags = IMXUART_HAVE_RTSCTS, |
42 | }; | 43 | }; |
43 | 44 | ||
45 | static struct pad_desc mx25pdk_pads[] = { | ||
46 | MX25_PAD_FEC_MDC__FEC_MDC, | ||
47 | MX25_PAD_FEC_MDIO__FEC_MDIO, | ||
48 | MX25_PAD_FEC_TDATA0__FEC_TDATA0, | ||
49 | MX25_PAD_FEC_TDATA1__FEC_TDATA1, | ||
50 | MX25_PAD_FEC_TX_EN__FEC_TX_EN, | ||
51 | MX25_PAD_FEC_RDATA0__FEC_RDATA0, | ||
52 | MX25_PAD_FEC_RDATA1__FEC_RDATA1, | ||
53 | MX25_PAD_FEC_RX_DV__FEC_RX_DV, | ||
54 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, | ||
55 | MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */ | ||
56 | MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */ | ||
57 | }; | ||
58 | |||
59 | static struct fec_platform_data mx25_fec_pdata = { | ||
60 | .phy = PHY_INTERFACE_MODE_RMII, | ||
61 | }; | ||
62 | |||
63 | #define FEC_ENABLE_GPIO 35 | ||
64 | #define FEC_RESET_B_GPIO 104 | ||
65 | |||
66 | static void __init mx25pdk_fec_reset(void) | ||
67 | { | ||
68 | gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable"); | ||
69 | gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset"); | ||
70 | |||
71 | gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */ | ||
72 | gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */ | ||
73 | udelay(2); | ||
74 | |||
75 | /* turn on PHY power and lift reset */ | ||
76 | gpio_set_value(FEC_ENABLE_GPIO, 1); | ||
77 | gpio_set_value(FEC_RESET_B_GPIO, 1); | ||
78 | } | ||
79 | |||
44 | static void __init mx25pdk_init(void) | 80 | static void __init mx25pdk_init(void) |
45 | { | 81 | { |
82 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, | ||
83 | ARRAY_SIZE(mx25pdk_pads)); | ||
84 | |||
46 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 85 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
47 | mxc_register_device(&mxc_usbh2, NULL); | 86 | mxc_register_device(&mxc_usbh2, NULL); |
87 | |||
88 | mx25pdk_fec_reset(); | ||
89 | mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); | ||
48 | } | 90 | } |
49 | 91 | ||
50 | static void __init mx25pdk_timer_init(void) | 92 | static void __init mx25pdk_timer_init(void) |
51 | { | 93 | { |
52 | mx25_clocks_init(26000000); | 94 | mx25_clocks_init(); |
53 | } | 95 | } |
54 | 96 | ||
55 | static struct sys_timer mx25pdk_timer = { | 97 | static struct sys_timer mx25pdk_timer = { |