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authorBen Dooks <ben.dooks@codethink.co.uk>2012-06-04 12:50:12 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-10 09:47:52 -0400
commitf3e16ccd03fab2f8440609bd44feb882b5fdd31d (patch)
treed022fb8e1802cc53562c2ed0fc0cba44e95b8640 /arch/arm/mach-mvebu
parent75f41273ec558d4ffc22c2dbf7637d42f167cf25 (diff)
ARM: mvebu: MPIC: read number of interrupts from control register
Read the number of MPIC interrupts from the controller and only register that many. [gregory.clement@free-electrons.com: rename armada symbol name to fit with new name: armada_370_xp] Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/irq-armada-370-xp.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
index 645a8d3698eb..5f5f9394b6b2 100644
--- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -29,13 +29,12 @@
29#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) 29#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)
30#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) 30#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C)
31 31
32#define ARMADA_370_XP_INT_CONTROL (0x00)
32#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) 33#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
33#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) 34#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
34 35
35#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) 36#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
36 37
37#define ARMADA_370_XP_NR_IRQS (115)
38
39static void __iomem *per_cpu_int_base; 38static void __iomem *per_cpu_int_base;
40static void __iomem *main_int_base; 39static void __iomem *main_int_base;
41static struct irq_domain *armada_370_xp_mpic_domain; 40static struct irq_domain *armada_370_xp_mpic_domain;
@@ -81,14 +80,18 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
81static int __init armada_370_xp_mpic_of_init(struct device_node *node, 80static int __init armada_370_xp_mpic_of_init(struct device_node *node,
82 struct device_node *parent) 81 struct device_node *parent)
83{ 82{
83 u32 control;
84
84 main_int_base = of_iomap(node, 0); 85 main_int_base = of_iomap(node, 0);
85 per_cpu_int_base = of_iomap(node, 1); 86 per_cpu_int_base = of_iomap(node, 1);
86 87
87 BUG_ON(!main_int_base); 88 BUG_ON(!main_int_base);
88 BUG_ON(!per_cpu_int_base); 89 BUG_ON(!per_cpu_int_base);
89 90
91 control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
92
90 armada_370_xp_mpic_domain = 93 armada_370_xp_mpic_domain =
91 irq_domain_add_linear(node, ARMADA_370_XP_NR_IRQS, 94 irq_domain_add_linear(node, (control >> 2) & 0x3ff,
92 &armada_370_xp_mpic_irq_ops, NULL); 95 &armada_370_xp_mpic_irq_ops, NULL);
93 96
94 if (!armada_370_xp_mpic_domain) 97 if (!armada_370_xp_mpic_domain)