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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-06-05 03:04:55 -0400
committerJason Cooper <jason@lakedaemon.net>2013-06-13 13:48:20 -0400
commit865e0527d2d791083a40555f2ba872da5fbddda8 (patch)
tree1b4b4af855c606a4acef2ac04f5932632c120160 /arch/arm/mach-mvebu
parentb21dcafea36dd6249df9cf485a48c7337a8987af (diff)
arm: mvebu: avoid hardcoded virtual address in coherency code
Now that the coherency_get_cpu_count() function no longer requires a very early mapping of the coherency unit registers, we can avoid the hardcoded virtual address in coherency.c. However, the coherency features are still used quite early, so we need to do the of_iomap() early enough, at the ->init_timer() level, so we have the call of coherency_init() at this point. Unfortunately, at ->init_timer() time, it is not possible to register a bus notifier, so we add a separate coherency_late_init() function that gets called as as postcore_initcall(), when bus notifiers are available. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c2
-rw-r--r--arch/arm/mach-mvebu/coherency.c20
2 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index cf8e357a0a02..b9319c44d0d2 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -46,6 +46,7 @@ static void __init armada_370_xp_timer_and_clk_init(void)
46{ 46{
47 mvebu_clocks_init(); 47 mvebu_clocks_init();
48 armada_370_xp_timer_init(); 48 armada_370_xp_timer_init();
49 coherency_init();
49} 50}
50 51
51static void __init armada_370_xp_init_early(void) 52static void __init armada_370_xp_init_early(void)
@@ -75,7 +76,6 @@ static void __init armada_370_xp_init_early(void)
75static void __init armada_370_xp_dt_init(void) 76static void __init armada_370_xp_dt_init(void)
76{ 77{
77 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 78 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
78 coherency_init();
79} 79}
80 80
81static const char * const armada_370_xp_dt_compat[] = { 81static const char * const armada_370_xp_dt_compat[] = {
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 46d66c0a7dc5..d74794a590f1 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -27,14 +27,7 @@
27#include <asm/smp_plat.h> 27#include <asm/smp_plat.h>
28#include "armada-370-xp.h" 28#include "armada-370-xp.h"
29 29
30/* 30static void __iomem *coherency_base;
31 * Some functions in this file are called very early during SMP
32 * initialization. At that time the device tree framework is not yet
33 * ready, and it is not possible to get the register address to
34 * ioremap it. That's why the pointer below is given with an initial
35 * value matching its virtual mapping
36 */
37static void __iomem *coherency_base = ARMADA_370_XP_REGS_VIRT_BASE + 0x20200;
38static void __iomem *coherency_cpu_base; 31static void __iomem *coherency_cpu_base;
39 32
40/* Coherency fabric registers */ 33/* Coherency fabric registers */
@@ -135,9 +128,16 @@ int __init coherency_init(void)
135 coherency_base = of_iomap(np, 0); 128 coherency_base = of_iomap(np, 0);
136 coherency_cpu_base = of_iomap(np, 1); 129 coherency_cpu_base = of_iomap(np, 1);
137 set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); 130 set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
138 bus_register_notifier(&platform_bus_type,
139 &mvebu_hwcc_platform_nb);
140 } 131 }
141 132
142 return 0; 133 return 0;
143} 134}
135
136static int __init coherency_late_init(void)
137{
138 bus_register_notifier(&platform_bus_type,
139 &mvebu_hwcc_platform_nb);
140 return 0;
141}
142
143postcore_initcall(coherency_late_init);