aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mv78xx0/include/mach
diff options
context:
space:
mode:
authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-03-19 19:10:40 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-19 19:10:40 -0400
commit7d83f8fca517b123cf0136503a9e50974f65ec49 (patch)
tree92ed1faaf112e98e29a00efc99e1a4e6c79e6a8e /arch/arm/mach-mv78xx0/include/mach
parentbe093beb608edf821b45fe00a8a080fb5c6ed4af (diff)
parent569106c70e49ad67c69fa7d43a2a5218e63a4619 (diff)
Merge branch 'master' of git://git.marvell.com/orion into devel
Conflicts: arch/arm/mach-mx1/devices.c
Diffstat (limited to 'arch/arm/mach-mv78xx0/include/mach')
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index e930ea5330a2..582cffc733ad 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -80,6 +80,18 @@
80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
81 81
82/* 82/*
83 * Supported devices and revisions.
84 */
85#define MV78X00_Z0_DEV_ID 0x6381
86#define MV78X00_REV_Z0 1
87
88#define MV78100_DEV_ID 0x7810
89#define MV78100_REV_A0 1
90
91#define MV78200_DEV_ID 0x7820
92#define MV78200_REV_A0 1
93
94/*
83 * Register Map 95 * Register Map
84 */ 96 */
85#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000) 97#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000)
@@ -90,6 +102,8 @@
90#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) 102#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)
91#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) 103#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030)
92#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) 104#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034)
105#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
106#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100)
93#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) 107#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
94#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) 108#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000)
95#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) 109#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)