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authorDavid Brown <davidb@codeaurora.org>2011-02-14 16:43:54 -0500
committerDavid Brown <davidb@codeaurora.org>2011-02-14 16:43:54 -0500
commit7358cf2073e1abcfb85bb2829f73b2a12b909de6 (patch)
tree2f912ba63d1b0156a88f7cc725e8f775412e9600 /arch/arm/mach-msm
parent2ff9870c4cccf97d777bf5551d22303e0176b201 (diff)
parent6499f0a8b3f44141431df79923fb8f1d8017e139 (diff)
Merge branch 'msm-core' into for-next
* msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/Kconfig13
-rw-r--r--arch/arm/mach-msm/Makefile3
-rw-r--r--arch/arm/mach-msm/devices-iommu.c (renamed from arch/arm/mach-msm/devices-msm8x60-iommu.c)54
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h36
4 files changed, 40 insertions, 66 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index df9d74eaa472..997c5bda8c18 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -45,7 +45,6 @@ config ARCH_MSM8X60
45 select CPU_V7 45 select CPU_V7
46 select MSM_V2_TLMM 46 select MSM_V2_TLMM
47 select MSM_GPIOMUX 47 select MSM_GPIOMUX
48 select IOMMU_API
49 select MSM_SCM if SMP 48 select MSM_SCM if SMP
50 49
51config ARCH_MSM8960 50config ARCH_MSM8960
@@ -149,6 +148,18 @@ config MACH_MSM8960_RUMI3
149 148
150endmenu 149endmenu
151 150
151config MSM_IOMMU
152 bool "MSM IOMMU Support"
153 depends on ARCH_MSM8X60 || ARCH_MSM8960
154 select IOMMU_API
155 default n
156 help
157 Support for the IOMMUs found on certain Qualcomm SOCs.
158 These IOMMUs allow virtualization of the address space used by most
159 cores within the multimedia subsystem.
160
161 If unsure, say N here.
162
152config IOMMU_PGTABLES_L2 163config IOMMU_PGTABLES_L2
153 def_bool y 164 def_bool y
154 depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n 165 depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index ea8c74f56eaf..2099c979fe2c 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -4,11 +4,12 @@ obj-$(CONFIG_DEBUG_FS) += clock-debug.o
4endif 4endif
5 5
6obj-$(CONFIG_MSM_VIC) += irq-vic.o 6obj-$(CONFIG_MSM_VIC) += irq-vic.o
7obj-$(CONFIG_MSM_IOMMU) += iommu.o iommu_dev.o devices-iommu.o
7 8
8obj-$(CONFIG_ARCH_MSM7X00A) += dma.o irq.o acpuclock-arm11.o 9obj-$(CONFIG_ARCH_MSM7X00A) += dma.o irq.o acpuclock-arm11.o
9obj-$(CONFIG_ARCH_MSM7X30) += dma.o 10obj-$(CONFIG_ARCH_MSM7X30) += dma.o
10obj-$(CONFIG_ARCH_QSD8X50) += dma.o sirc.o 11obj-$(CONFIG_ARCH_QSD8X50) += dma.o sirc.o
11obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o iommu.o iommu_dev.o devices-msm8x60-iommu.o 12obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o
12obj-$(CONFIG_ARCH_MSM8960) += clock-dummy.o 13obj-$(CONFIG_ARCH_MSM8960) += clock-dummy.o
13 14
14obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o 15obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o
diff --git a/arch/arm/mach-msm/devices-msm8x60-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index f9e7bd34ec59..c0206b727502 100644
--- a/arch/arm/mach-msm/devices-msm8x60-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * This program is free software; you can redistribute it and/or modify 3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 4 * it under the terms of the GNU General Public License version 2 and
@@ -18,15 +18,13 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/bootmem.h> 20#include <linux/bootmem.h>
21 21#include <mach/irqs.h>
22#include <mach/msm_iomap-8x60.h>
23#include <mach/irqs-8x60.h>
24#include <mach/iommu.h> 22#include <mach/iommu.h>
25 23
26static struct resource msm_iommu_jpegd_resources[] = { 24static struct resource msm_iommu_jpegd_resources[] = {
27 { 25 {
28 .start = MSM_IOMMU_JPEGD_PHYS, 26 .start = 0x07300000,
29 .end = MSM_IOMMU_JPEGD_PHYS + MSM_IOMMU_JPEGD_SIZE - 1, 27 .end = 0x07300000 + SZ_1M - 1,
30 .name = "physbase", 28 .name = "physbase",
31 .flags = IORESOURCE_MEM, 29 .flags = IORESOURCE_MEM,
32 }, 30 },
@@ -46,8 +44,8 @@ static struct resource msm_iommu_jpegd_resources[] = {
46 44
47static struct resource msm_iommu_vpe_resources[] = { 45static struct resource msm_iommu_vpe_resources[] = {
48 { 46 {
49 .start = MSM_IOMMU_VPE_PHYS, 47 .start = 0x07400000,
50 .end = MSM_IOMMU_VPE_PHYS + MSM_IOMMU_VPE_SIZE - 1, 48 .end = 0x07400000 + SZ_1M - 1,
51 .name = "physbase", 49 .name = "physbase",
52 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_MEM,
53 }, 51 },
@@ -67,8 +65,8 @@ static struct resource msm_iommu_vpe_resources[] = {
67 65
68static struct resource msm_iommu_mdp0_resources[] = { 66static struct resource msm_iommu_mdp0_resources[] = {
69 { 67 {
70 .start = MSM_IOMMU_MDP0_PHYS, 68 .start = 0x07500000,
71 .end = MSM_IOMMU_MDP0_PHYS + MSM_IOMMU_MDP0_SIZE - 1, 69 .end = 0x07500000 + SZ_1M - 1,
72 .name = "physbase", 70 .name = "physbase",
73 .flags = IORESOURCE_MEM, 71 .flags = IORESOURCE_MEM,
74 }, 72 },
@@ -88,8 +86,8 @@ static struct resource msm_iommu_mdp0_resources[] = {
88 86
89static struct resource msm_iommu_mdp1_resources[] = { 87static struct resource msm_iommu_mdp1_resources[] = {
90 { 88 {
91 .start = MSM_IOMMU_MDP1_PHYS, 89 .start = 0x07600000,
92 .end = MSM_IOMMU_MDP1_PHYS + MSM_IOMMU_MDP1_SIZE - 1, 90 .end = 0x07600000 + SZ_1M - 1,
93 .name = "physbase", 91 .name = "physbase",
94 .flags = IORESOURCE_MEM, 92 .flags = IORESOURCE_MEM,
95 }, 93 },
@@ -109,8 +107,8 @@ static struct resource msm_iommu_mdp1_resources[] = {
109 107
110static struct resource msm_iommu_rot_resources[] = { 108static struct resource msm_iommu_rot_resources[] = {
111 { 109 {
112 .start = MSM_IOMMU_ROT_PHYS, 110 .start = 0x07700000,
113 .end = MSM_IOMMU_ROT_PHYS + MSM_IOMMU_ROT_SIZE - 1, 111 .end = 0x07700000 + SZ_1M - 1,
114 .name = "physbase", 112 .name = "physbase",
115 .flags = IORESOURCE_MEM, 113 .flags = IORESOURCE_MEM,
116 }, 114 },
@@ -130,8 +128,8 @@ static struct resource msm_iommu_rot_resources[] = {
130 128
131static struct resource msm_iommu_ijpeg_resources[] = { 129static struct resource msm_iommu_ijpeg_resources[] = {
132 { 130 {
133 .start = MSM_IOMMU_IJPEG_PHYS, 131 .start = 0x07800000,
134 .end = MSM_IOMMU_IJPEG_PHYS + MSM_IOMMU_IJPEG_SIZE - 1, 132 .end = 0x07800000 + SZ_1M - 1,
135 .name = "physbase", 133 .name = "physbase",
136 .flags = IORESOURCE_MEM, 134 .flags = IORESOURCE_MEM,
137 }, 135 },
@@ -151,8 +149,8 @@ static struct resource msm_iommu_ijpeg_resources[] = {
151 149
152static struct resource msm_iommu_vfe_resources[] = { 150static struct resource msm_iommu_vfe_resources[] = {
153 { 151 {
154 .start = MSM_IOMMU_VFE_PHYS, 152 .start = 0x07900000,
155 .end = MSM_IOMMU_VFE_PHYS + MSM_IOMMU_VFE_SIZE - 1, 153 .end = 0x07900000 + SZ_1M - 1,
156 .name = "physbase", 154 .name = "physbase",
157 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
158 }, 156 },
@@ -172,8 +170,8 @@ static struct resource msm_iommu_vfe_resources[] = {
172 170
173static struct resource msm_iommu_vcodec_a_resources[] = { 171static struct resource msm_iommu_vcodec_a_resources[] = {
174 { 172 {
175 .start = MSM_IOMMU_VCODEC_A_PHYS, 173 .start = 0x07A00000,
176 .end = MSM_IOMMU_VCODEC_A_PHYS + MSM_IOMMU_VCODEC_A_SIZE - 1, 174 .end = 0x07A00000 + SZ_1M - 1,
177 .name = "physbase", 175 .name = "physbase",
178 .flags = IORESOURCE_MEM, 176 .flags = IORESOURCE_MEM,
179 }, 177 },
@@ -193,8 +191,8 @@ static struct resource msm_iommu_vcodec_a_resources[] = {
193 191
194static struct resource msm_iommu_vcodec_b_resources[] = { 192static struct resource msm_iommu_vcodec_b_resources[] = {
195 { 193 {
196 .start = MSM_IOMMU_VCODEC_B_PHYS, 194 .start = 0x07B00000,
197 .end = MSM_IOMMU_VCODEC_B_PHYS + MSM_IOMMU_VCODEC_B_SIZE - 1, 195 .end = 0x07B00000 + SZ_1M - 1,
198 .name = "physbase", 196 .name = "physbase",
199 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
200 }, 198 },
@@ -214,8 +212,8 @@ static struct resource msm_iommu_vcodec_b_resources[] = {
214 212
215static struct resource msm_iommu_gfx3d_resources[] = { 213static struct resource msm_iommu_gfx3d_resources[] = {
216 { 214 {
217 .start = MSM_IOMMU_GFX3D_PHYS, 215 .start = 0x07C00000,
218 .end = MSM_IOMMU_GFX3D_PHYS + MSM_IOMMU_GFX3D_SIZE - 1, 216 .end = 0x07C00000 + SZ_1M - 1,
219 .name = "physbase", 217 .name = "physbase",
220 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
221 }, 219 },
@@ -235,8 +233,8 @@ static struct resource msm_iommu_gfx3d_resources[] = {
235 233
236static struct resource msm_iommu_gfx2d0_resources[] = { 234static struct resource msm_iommu_gfx2d0_resources[] = {
237 { 235 {
238 .start = MSM_IOMMU_GFX2D0_PHYS, 236 .start = 0x07D00000,
239 .end = MSM_IOMMU_GFX2D0_PHYS + MSM_IOMMU_GFX2D0_SIZE - 1, 237 .end = 0x07D00000 + SZ_1M - 1,
240 .name = "physbase", 238 .name = "physbase",
241 .flags = IORESOURCE_MEM, 239 .flags = IORESOURCE_MEM,
242 }, 240 },
@@ -256,8 +254,8 @@ static struct resource msm_iommu_gfx2d0_resources[] = {
256 254
257static struct resource msm_iommu_gfx2d1_resources[] = { 255static struct resource msm_iommu_gfx2d1_resources[] = {
258 { 256 {
259 .start = MSM_IOMMU_GFX2D1_PHYS, 257 .start = 0x07E00000,
260 .end = MSM_IOMMU_GFX2D1_PHYS + MSM_IOMMU_GFX2D1_SIZE - 1, 258 .end = 0x07E00000 + SZ_1M - 1,
261 .name = "physbase", 259 .name = "physbase",
262 .flags = IORESOURCE_MEM, 260 .flags = IORESOURCE_MEM,
263 }, 261 },
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 5bd18db11aea..3b19b8f244b8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -62,40 +62,4 @@
62#define MSM8X60_TMR0_PHYS 0x02040000 62#define MSM8X60_TMR0_PHYS 0x02040000
63#define MSM8X60_TMR0_SIZE SZ_4K 63#define MSM8X60_TMR0_SIZE SZ_4K
64 64
65#define MSM_IOMMU_JPEGD_PHYS 0x07300000
66#define MSM_IOMMU_JPEGD_SIZE SZ_1M
67
68#define MSM_IOMMU_VPE_PHYS 0x07400000
69#define MSM_IOMMU_VPE_SIZE SZ_1M
70
71#define MSM_IOMMU_MDP0_PHYS 0x07500000
72#define MSM_IOMMU_MDP0_SIZE SZ_1M
73
74#define MSM_IOMMU_MDP1_PHYS 0x07600000
75#define MSM_IOMMU_MDP1_SIZE SZ_1M
76
77#define MSM_IOMMU_ROT_PHYS 0x07700000
78#define MSM_IOMMU_ROT_SIZE SZ_1M
79
80#define MSM_IOMMU_IJPEG_PHYS 0x07800000
81#define MSM_IOMMU_IJPEG_SIZE SZ_1M
82
83#define MSM_IOMMU_VFE_PHYS 0x07900000
84#define MSM_IOMMU_VFE_SIZE SZ_1M
85
86#define MSM_IOMMU_VCODEC_A_PHYS 0x07A00000
87#define MSM_IOMMU_VCODEC_A_SIZE SZ_1M
88
89#define MSM_IOMMU_VCODEC_B_PHYS 0x07B00000
90#define MSM_IOMMU_VCODEC_B_SIZE SZ_1M
91
92#define MSM_IOMMU_GFX3D_PHYS 0x07C00000
93#define MSM_IOMMU_GFX3D_SIZE SZ_1M
94
95#define MSM_IOMMU_GFX2D0_PHYS 0x07D00000
96#define MSM_IOMMU_GFX2D0_SIZE SZ_1M
97
98#define MSM_IOMMU_GFX2D1_PHYS 0x07E00000
99#define MSM_IOMMU_GFX2D1_SIZE SZ_1M
100
101#endif 65#endif