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authorStephen Boyd <sboyd@codeaurora.org>2013-07-24 16:54:28 -0400
committerDavid Brown <davidb@codeaurora.org>2013-08-06 14:17:40 -0400
commit6d07917e3f9f109477ac3ed72485f87e54132cfd (patch)
tree210f7b20818ea797fe5d6fd16b6acda9f13ea919 /arch/arm/mach-msm
parent0c211c29f2439e42b5c5b20c65dfde6f39aa7bbf (diff)
ARM: msm: Move debug-macro.S to include/debug
One more step to allowing MSM to participate in the multi-platform defconfig. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb: Comment cleanup requested by sboyd] Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S65
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h12
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h63
-rw-r--r--arch/arm/mach-msm/io.c40
6 files changed, 21 insertions, 169 deletions
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
deleted file mode 100644
index 0e05f88abcd5..000000000000
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <mach/hardware.h>
19#include <mach/msm_iomap.h>
20
21 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
23 ldr \rp, =MSM_DEBUG_UART_PHYS
24 ldr \rv, =MSM_DEBUG_UART_BASE
25#endif
26 .endm
27
28 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
33 str \rd, [\rx, #0x0C]
34#endif
35 .endm
36
37 .macro waituart, rd, rx
38#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
39 @ check for TX_EMT in UARTDM_SR
40 ldr \rd, [\rx, #0x08]
41 tst \rd, #0x08
42 bne 1002f
43 @ wait for TXREADY in UARTDM_ISR
441001: ldr \rd, [\rx, #0x14]
45 tst \rd, #0x80
46 beq 1001b
471002:
48 @ Clear TX_READY by writing to the UARTDM_CR register
49 mov \rd, #0x300
50 str \rd, [\rx, #0x10]
51 @ Write 0x1 to NCF register
52 mov \rd, #0x1
53 str \rd, [\rx, #0x40]
54 @ UARTDM reg. Read to induce delay
55 ldr \rd, [\rx, #0x08]
56#else
57 @ wait for TX_READY
581001: ldr \rd, [\rx, #0x08]
59 tst \rd, #0x04
60 beq 1001b
61#endif
62 .endm
63
64 .macro busyuart, rd, rx
65 .endm
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 7bca8d7108d6..396958baa6d1 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -38,9 +38,4 @@
38#define MSM8960_TMR0_PHYS 0x0208A000 38#define MSM8960_TMR0_PHYS 0x0208A000
39#define MSM8960_TMR0_SIZE SZ_4K 39#define MSM8960_TMR0_SIZE SZ_4K
40 40
41#ifdef CONFIG_DEBUG_MSM8960_UART
42#define MSM_DEBUG_UART_BASE 0xF0040000
43#define MSM_DEBUG_UART_PHYS 0x16440000
44#endif
45
46#endif 41#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4f57b437c1b4..dede6aa23303 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -41,9 +41,4 @@
41#define MSM8X60_TMR0_PHYS 0x02040000 41#define MSM8X60_TMR0_PHYS 0x02040000
42#define MSM8X60_TMR0_SIZE SZ_4K 42#define MSM8X60_TMR0_SIZE SZ_4K
43 43
44#ifdef CONFIG_DEBUG_MSM8660_UART
45#define MSM_DEBUG_UART_BASE 0xF0040000
46#define MSM_DEBUG_UART_PHYS 0x19C40000
47#endif
48
49#endif 44#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index c56e81ffdcde..0b36c42d1f5b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -48,18 +48,6 @@
48#include "msm_iomap-8x60.h" 48#include "msm_iomap-8x60.h"
49#include "msm_iomap-8960.h" 49#include "msm_iomap-8960.h"
50 50
51#define MSM_DEBUG_UART_SIZE SZ_4K
52#if defined(CONFIG_DEBUG_MSM_UART1)
53#define MSM_DEBUG_UART_BASE 0xE1000000
54#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
55#elif defined(CONFIG_DEBUG_MSM_UART2)
56#define MSM_DEBUG_UART_BASE 0xE1000000
57#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
58#elif defined(CONFIG_DEBUG_MSM_UART3)
59#define MSM_DEBUG_UART_BASE 0xE1000000
60#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
61#endif
62
63/* Virtual addresses shared across all MSM targets. */ 51/* Virtual addresses shared across all MSM targets. */
64#define MSM_CSR_BASE IOMEM(0xE0001000) 52#define MSM_CSR_BASE IOMEM(0xE0001000)
65#define MSM_TMR_BASE IOMEM(0xF0200000) 53#define MSM_TMR_BASE IOMEM(0xF0200000)
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
deleted file mode 100644
index 94324870fb04..000000000000
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18
19#include <asm/barrier.h>
20#include <asm/processor.h>
21#include <mach/msm_iomap.h>
22
23#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
24#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
25
26#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
27#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
28#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
29#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
30#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
31
32static void putc(int c)
33{
34#if defined(MSM_DEBUG_UART_PHYS)
35#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
36 /*
37 * Wait for TX_READY to be set; but skip it if we have a
38 * TX underrun.
39 */
40 if (!(UART_DM_SR & 0x08))
41 while (!(UART_DM_ISR & 0x80))
42 cpu_relax();
43
44 UART_DM_CR = 0x300;
45 UART_DM_NCHAR = 0x1;
46 UART_DM_TF = c;
47#else
48 while (!(UART_CSR & 0x04))
49 cpu_relax();
50 UART_TF = c;
51#endif
52#endif
53}
54
55static inline void flush(void)
56{
57}
58
59static inline void arch_decomp_setup(void)
60{
61}
62
63#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 4a1a222ac778..fe7c8549475a 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -52,26 +52,38 @@ static struct map_desc msm_io_desc[] __initdata = {
52 MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED), 52 MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
53 MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED), 53 MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
54 MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED), 54 MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
55#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
56 defined(CONFIG_DEBUG_MSM_UART3)
57 MSM_DEVICE_TYPE(DEBUG_UART, MT_DEVICE_NONSHARED),
58#endif
59 { 55 {
60 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 56 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
61 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 57 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
62 .length = MSM_SHARED_RAM_SIZE, 58 .length = MSM_SHARED_RAM_SIZE,
63 .type = MT_DEVICE, 59 .type = MT_DEVICE,
64 }, 60 },
61#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
62 defined(CONFIG_DEBUG_MSM_UART3)
63 {
64 /* Must be last: virtual and pfn filled in by debug_ll_addr() */
65 .length = SZ_4K,
66 .type = MT_DEVICE_NONSHARED,
67 }
68#endif
65}; 69};
66 70
67void __init msm_map_common_io(void) 71void __init msm_map_common_io(void)
68{ 72{
73 size_t size = ARRAY_SIZE(msm_io_desc);
74
69 /* Make sure the peripheral register window is closed, since 75 /* Make sure the peripheral register window is closed, since
70 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which 76 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
71 * pages are peripheral interface or not. 77 * pages are peripheral interface or not.
72 */ 78 */
73 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); 79 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
74 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); 80#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
81 defined(CONFIG_DEBUG_MSM_UART3)
82 debug_ll_addr(&msm_io_desc[size - 1].pfn,
83 &msm_io_desc[size - 1].virtual);
84 msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
85#endif
86 iotable_init(msm_io_desc, size);
75} 87}
76#endif 88#endif
77 89
@@ -87,10 +99,6 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
87 MSM_DEVICE(SCPLL), 99 MSM_DEVICE(SCPLL),
88 MSM_DEVICE(AD5), 100 MSM_DEVICE(AD5),
89 MSM_DEVICE(MDC), 101 MSM_DEVICE(MDC),
90#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
91 defined(CONFIG_DEBUG_MSM_UART3)
92 MSM_DEVICE(DEBUG_UART),
93#endif
94 { 102 {
95 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 103 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
96 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 104 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@@ -101,6 +109,7 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
101 109
102void __init msm_map_qsd8x50_io(void) 110void __init msm_map_qsd8x50_io(void)
103{ 111{
112 debug_ll_io_init();
104 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc)); 113 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
105} 114}
106#endif /* CONFIG_ARCH_QSD8X50 */ 115#endif /* CONFIG_ARCH_QSD8X50 */
@@ -109,13 +118,11 @@ void __init msm_map_qsd8x50_io(void)
109static struct map_desc msm8x60_io_desc[] __initdata = { 118static struct map_desc msm8x60_io_desc[] __initdata = {
110 MSM_CHIP_DEVICE(TMR, MSM8X60), 119 MSM_CHIP_DEVICE(TMR, MSM8X60),
111 MSM_CHIP_DEVICE(TMR0, MSM8X60), 120 MSM_CHIP_DEVICE(TMR0, MSM8X60),
112#ifdef CONFIG_DEBUG_MSM8660_UART
113 MSM_DEVICE(DEBUG_UART),
114#endif
115}; 121};
116 122
117void __init msm_map_msm8x60_io(void) 123void __init msm_map_msm8x60_io(void)
118{ 124{
125 debug_ll_io_init();
119 iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc)); 126 iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
120} 127}
121#endif /* CONFIG_ARCH_MSM8X60 */ 128#endif /* CONFIG_ARCH_MSM8X60 */
@@ -124,13 +131,11 @@ void __init msm_map_msm8x60_io(void)
124static struct map_desc msm8960_io_desc[] __initdata = { 131static struct map_desc msm8960_io_desc[] __initdata = {
125 MSM_CHIP_DEVICE(TMR, MSM8960), 132 MSM_CHIP_DEVICE(TMR, MSM8960),
126 MSM_CHIP_DEVICE(TMR0, MSM8960), 133 MSM_CHIP_DEVICE(TMR0, MSM8960),
127#ifdef CONFIG_DEBUG_MSM8960_UART
128 MSM_DEVICE(DEBUG_UART),
129#endif
130}; 134};
131 135
132void __init msm_map_msm8960_io(void) 136void __init msm_map_msm8960_io(void)
133{ 137{
138 debug_ll_io_init();
134 iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc)); 139 iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
135} 140}
136#endif /* CONFIG_ARCH_MSM8960 */ 141#endif /* CONFIG_ARCH_MSM8960 */
@@ -150,10 +155,6 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
150 MSM_DEVICE(SAW), 155 MSM_DEVICE(SAW),
151 MSM_DEVICE(GCC), 156 MSM_DEVICE(GCC),
152 MSM_DEVICE(TCSR), 157 MSM_DEVICE(TCSR),
153#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
154 defined(CONFIG_DEBUG_MSM_UART3)
155 MSM_DEVICE(DEBUG_UART),
156#endif
157 { 158 {
158 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 159 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
159 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 160 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@@ -164,6 +165,7 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
164 165
165void __init msm_map_msm7x30_io(void) 166void __init msm_map_msm7x30_io(void)
166{ 167{
168 debug_ll_io_init();
167 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc)); 169 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
168} 170}
169#endif /* CONFIG_ARCH_MSM7X30 */ 171#endif /* CONFIG_ARCH_MSM7X30 */