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authorStephen Boyd <sboyd@codeaurora.org>2012-09-05 15:28:51 -0400
committerDavid Brown <davidb@codeaurora.org>2012-09-13 14:14:29 -0400
commit66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch)
treec348c8ba6bf082bafaa44e390f3129ce2dd45b4c /arch/arm/mach-msm/timer.c
parente8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff)
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the PPIs to be edge triggered. Now that we have the percpu irq interface we don't need this code so let's remove it and update the percpu irq user (msm_timer) to set the irq type. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/timer.c')
-rw-r--r--arch/arm/mach-msm/timer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 812808254936..36bbc60b699f 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -151,7 +151,7 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
151 151
152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt; 152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt;
153 clockevents_register_device(evt); 153 clockevents_register_device(evt);
154 enable_percpu_irq(evt->irq, 0); 154 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
155 return 0; 155 return 0;
156} 156}
157 157
@@ -219,7 +219,7 @@ static void __init msm_timer_init(void)
219 res = request_percpu_irq(ce->irq, msm_timer_interrupt, 219 res = request_percpu_irq(ce->irq, msm_timer_interrupt,
220 ce->name, msm_evt.percpu_evt); 220 ce->name, msm_evt.percpu_evt);
221 if (!res) { 221 if (!res) {
222 enable_percpu_irq(ce->irq, 0); 222 enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING);
223#ifdef CONFIG_LOCAL_TIMERS 223#ifdef CONFIG_LOCAL_TIMERS
224 local_timer_register(&msm_local_timer_ops); 224 local_timer_register(&msm_local_timer_ops);
225#endif 225#endif