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authorStepan Moskovchenko <stepanm@codeaurora.org>2011-02-28 19:04:55 -0500
committerDavid Brown <davidb@codeaurora.org>2011-03-08 17:42:30 -0500
commitb0e7808d548ea1d857216d31d63078411203a116 (patch)
treeeed2f1cd89faf7b5f84e649947cb086aa9ffd7a6 /arch/arm/mach-msm/iommu.c
parenta43d8c101eb71bf4527dd7f36a34a5a502894f38 (diff)
msm: iommu: Don't read from write-only registers
Don't read from V2Pxx command registers when doing iova-to-phys operations. These registers are write-only and reading the value before modifying the VA bits is unnecessary. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/iommu.c')
-rw-r--r--arch/arm/mach-msm/iommu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 0146f519e85c..1a584e077c61 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -579,7 +579,7 @@ static phys_addr_t msm_iommu_iova_to_phys(struct iommu_domain *domain,
579 579
580 /* Invalidate context TLB */ 580 /* Invalidate context TLB */
581 SET_CTX_TLBIALL(base, ctx, 0); 581 SET_CTX_TLBIALL(base, ctx, 0);
582 SET_V2PPR_VA(base, ctx, va >> V2Pxx_VA_SHIFT); 582 SET_V2PPR(base, ctx, va & V2Pxx_VA);
583 583
584 par = GET_PAR(base, ctx); 584 par = GET_PAR(base, ctx);
585 585