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authorDavid Brown <davidb@codeaurora.org>2011-01-07 13:20:49 -0500
committerDavid Brown <davidb@codeaurora.org>2011-01-21 18:27:50 -0500
commit8c27e6f305242ffab0c88eed5dea8394b8ce86d0 (patch)
tree1fdcfc10f74a18883848b7273edd9f7e01cbcefe /arch/arm/mach-msm/io.c
parent87fa28e972c223f69c1315a1b2ddb2a11d33ad0e (diff)
msm: Generalize timer register mappings
Allow the timer register to be determined dynamically instead of at compile time. Use common virtual addresses for the registers across all MSM chips, and select the register mappings based on the detected CPU. Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/io.c')
-rw-r--r--arch/arm/mach-msm/io.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 1260007a9dd1..97dcd8c43ab0 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -3,7 +3,7 @@
3 * MSM7K, QSD io support 3 * MSM7K, QSD io support
4 * 4 *
5 * Copyright (C) 2007 Google, Inc. 5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. 6 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
7 * Author: Brian Swetland <swetland@google.com> 7 * Author: Brian Swetland <swetland@google.com>
8 * 8 *
9 * This software is licensed under the terms of the GNU General Public 9 * This software is licensed under the terms of the GNU General Public
@@ -28,18 +28,20 @@
28 28
29#include <mach/board.h> 29#include <mach/board.h>
30 30
31#define MSM_DEVICE(name) { \ 31#define MSM_CHIP_DEVICE(name, chip) { \
32 .virtual = (unsigned long) MSM_##name##_BASE, \ 32 .virtual = (unsigned long) MSM_##name##_BASE, \
33 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \ 33 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
34 .length = MSM_##name##_SIZE, \ 34 .length = chip##_##name##_SIZE, \
35 .type = MT_DEVICE_NONSHARED, \ 35 .type = MT_DEVICE_NONSHARED, \
36 } 36 }
37 37
38#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
39
38#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \ 40#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
39 || defined(CONFIG_ARCH_MSM7X25) 41 || defined(CONFIG_ARCH_MSM7X25)
40static struct map_desc msm_io_desc[] __initdata = { 42static struct map_desc msm_io_desc[] __initdata = {
41 MSM_DEVICE(VIC), 43 MSM_DEVICE(VIC),
42 MSM_DEVICE(CSR), 44 MSM_CHIP_DEVICE(CSR, MSM7X00),
43 MSM_DEVICE(GPT), 45 MSM_DEVICE(GPT),
44 MSM_DEVICE(DMOV), 46 MSM_DEVICE(DMOV),
45 MSM_DEVICE(GPIO1), 47 MSM_DEVICE(GPIO1),
@@ -73,8 +75,7 @@ void __init msm_map_common_io(void)
73#ifdef CONFIG_ARCH_QSD8X50 75#ifdef CONFIG_ARCH_QSD8X50
74static struct map_desc qsd8x50_io_desc[] __initdata = { 76static struct map_desc qsd8x50_io_desc[] __initdata = {
75 MSM_DEVICE(VIC), 77 MSM_DEVICE(VIC),
76 MSM_DEVICE(CSR), 78 MSM_CHIP_DEVICE(CSR, QSD8X50),
77 MSM_DEVICE(TMR),
78 MSM_DEVICE(DMOV), 79 MSM_DEVICE(DMOV),
79 MSM_DEVICE(GPIO1), 80 MSM_DEVICE(GPIO1),
80 MSM_DEVICE(GPIO2), 81 MSM_DEVICE(GPIO2),
@@ -104,8 +105,8 @@ void __init msm_map_qsd8x50_io(void)
104static struct map_desc msm8x60_io_desc[] __initdata = { 105static struct map_desc msm8x60_io_desc[] __initdata = {
105 MSM_DEVICE(QGIC_DIST), 106 MSM_DEVICE(QGIC_DIST),
106 MSM_DEVICE(QGIC_CPU), 107 MSM_DEVICE(QGIC_CPU),
107 MSM_DEVICE(TMR), 108 MSM_CHIP_DEVICE(TMR, MSM8X60),
108 MSM_DEVICE(TMR0), 109 MSM_CHIP_DEVICE(TMR0, MSM8X60),
109 MSM_DEVICE(ACC), 110 MSM_DEVICE(ACC),
110 MSM_DEVICE(GCC), 111 MSM_DEVICE(GCC),
111}; 112};
@@ -119,8 +120,7 @@ void __init msm_map_msm8x60_io(void)
119#ifdef CONFIG_ARCH_MSM7X30 120#ifdef CONFIG_ARCH_MSM7X30
120static struct map_desc msm7x30_io_desc[] __initdata = { 121static struct map_desc msm7x30_io_desc[] __initdata = {
121 MSM_DEVICE(VIC), 122 MSM_DEVICE(VIC),
122 MSM_DEVICE(CSR), 123 MSM_CHIP_DEVICE(CSR, MSM7X30),
123 MSM_DEVICE(TMR),
124 MSM_DEVICE(DMOV), 124 MSM_DEVICE(DMOV),
125 MSM_DEVICE(GPIO1), 125 MSM_DEVICE(GPIO1),
126 MSM_DEVICE(GPIO2), 126 MSM_DEVICE(GPIO2),