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authorStepan Moskovchenko <stepanm@codeaurora.org>2010-11-15 20:46:10 -0500
committerDaniel Walker <dwalker@codeaurora.org>2010-11-30 19:03:16 -0500
commit2607b0a26094b2d2d174c3e27b2ecc9c49d86f40 (patch)
treea678fe432fed89274cf0e05aab62146cb7b42a39 /arch/arm/mach-msm/Kconfig
parentf6f41eb9ccc0e6fad0ccba4c5e0a97de935db734 (diff)
msm: iommu: Kconfig item for cacheable page tables
Add a Kconfig item to allow the IOMMU page tables to be coherent in the L2 cache. This generally reduces IOTLB miss latencies and has been shown to improve multimedia performance. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/Kconfig')
-rw-r--r--arch/arm/mach-msm/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index dbbcfeb919db..1c6f76b3d1ac 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -122,6 +122,10 @@ config MACH_MSM8X60_FFA
122 122
123endmenu 123endmenu
124 124
125config IOMMU_PGTABLES_L2
126 def_bool y
127 depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n
128
125config MSM_DEBUG_UART 129config MSM_DEBUG_UART
126 int 130 int
127 default 1 if MSM_DEBUG_UART1 131 default 1 if MSM_DEBUG_UART1