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authorEric Miao <eric.miao@marvell.com>2009-04-13 06:29:52 -0400
committerEric Miao <eric.y.miao@gmail.com>2009-06-04 22:32:06 -0400
commita27ba768a11ac7a1d56688d4224cef3a802d1f89 (patch)
treeb6454495caae2103a104c0ae14232eed6e151738 /arch/arm/mach-mmp/include/mach
parent2a55b910e0d240984860fa0264866c122751bd09 (diff)
[ARM] pxa: add PWM devices support for pxa168/910
Signed-off-by: Mingwei Wang <mingwei.wang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-mmp/include/mach')
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h23
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa910.h8
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h20
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h20
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h14
5 files changed, 79 insertions, 6 deletions
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index dc4226371d64..3b216bf41e7f 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -264,4 +264,27 @@
264#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2) 264#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2)
265#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2) 265#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2)
266 266
267/* PWM */
268#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1)
269#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1)
270#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1)
271#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1)
272#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2)
273#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2)
274#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2)
275#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2)
276#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2)
277#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2)
278#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2)
279#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2)
280#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2)
281#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4)
282#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3)
283#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1)
284#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1)
285#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1)
286#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1)
287#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2)
288#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3)
289
267#endif /* __ASM_MACH_MFP_PXA168_H */ 290#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index d97de36c50ad..bf1189ff9a34 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -159,4 +159,12 @@
159#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM) 159#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
160#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM) 160#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
161 161
162/* PWM */
163#define GPIO27 PWM3 AF2 MFP_CFG(GPIO27, AF2)
164#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2)
165#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2)
166#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2)
167#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2)
168#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2)
169
162#endif /* __ASM_MACH MFP_PXA910_H */ 170#endif /* __ASM_MACH MFP_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index bfdd6299dff5..6bf1f0eefcd1 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -9,6 +9,10 @@ extern struct pxa_device_desc pxa168_device_uart1;
9extern struct pxa_device_desc pxa168_device_uart2; 9extern struct pxa_device_desc pxa168_device_uart2;
10extern struct pxa_device_desc pxa168_device_twsi0; 10extern struct pxa_device_desc pxa168_device_twsi0;
11extern struct pxa_device_desc pxa168_device_twsi1; 11extern struct pxa_device_desc pxa168_device_twsi1;
12extern struct pxa_device_desc pxa168_device_pwm1;
13extern struct pxa_device_desc pxa168_device_pwm2;
14extern struct pxa_device_desc pxa168_device_pwm3;
15extern struct pxa_device_desc pxa168_device_pwm4;
12 16
13static inline int pxa168_add_uart(int id) 17static inline int pxa168_add_uart(int id)
14{ 18{
@@ -44,4 +48,20 @@ static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data,
44 48
45 return pxa_register_device(d, data, sizeof(*data)); 49 return pxa_register_device(d, data, sizeof(*data));
46} 50}
51
52static inline int pxa168_add_pwm(int id)
53{
54 struct pxa_device_desc *d = NULL;
55
56 switch (id) {
57 case 1: d = &pxa168_device_pwm1; break;
58 case 2: d = &pxa168_device_pwm2; break;
59 case 3: d = &pxa168_device_pwm3; break;
60 case 4: d = &pxa168_device_pwm4; break;
61 default:
62 return -EINVAL;
63 }
64
65 return pxa_register_device(d, NULL, 0);
66}
47#endif /* __ASM_MACH_PXA168_H */ 67#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index a0f0cbee1c07..6ae1ed7a0a9f 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -9,6 +9,10 @@ extern struct pxa_device_desc pxa910_device_uart1;
9extern struct pxa_device_desc pxa910_device_uart2; 9extern struct pxa_device_desc pxa910_device_uart2;
10extern struct pxa_device_desc pxa910_device_twsi0; 10extern struct pxa_device_desc pxa910_device_twsi0;
11extern struct pxa_device_desc pxa910_device_twsi1; 11extern struct pxa_device_desc pxa910_device_twsi1;
12extern struct pxa_device_desc pxa910_device_pwm1;
13extern struct pxa_device_desc pxa910_device_pwm2;
14extern struct pxa_device_desc pxa910_device_pwm3;
15extern struct pxa_device_desc pxa910_device_pwm4;
12 16
13static inline int pxa910_add_uart(int id) 17static inline int pxa910_add_uart(int id)
14{ 18{
@@ -44,4 +48,20 @@ static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data,
44 48
45 return pxa_register_device(d, data, sizeof(*data)); 49 return pxa_register_device(d, data, sizeof(*data));
46} 50}
51
52static inline int pxa910_add_pwm(int id)
53{
54 struct pxa_device_desc *d = NULL;
55
56 switch (id) {
57 case 1: d = &pxa910_device_pwm1; break;
58 case 2: d = &pxa910_device_pwm2; break;
59 case 3: d = &pxa910_device_pwm3; break;
60 case 4: d = &pxa910_device_pwm4; break;
61 default:
62 return -EINVAL;
63 }
64
65 return pxa_register_device(d, NULL, 0);
66}
47#endif /* __ASM_MACH_PXA910_H */ 67#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index c6b8c9dc2026..98ccbee4bd0c 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -22,8 +22,10 @@
22#define APBC_PXA168_UART1 APBC_REG(0x000) 22#define APBC_PXA168_UART1 APBC_REG(0x000)
23#define APBC_PXA168_UART2 APBC_REG(0x004) 23#define APBC_PXA168_UART2 APBC_REG(0x004)
24#define APBC_PXA168_GPIO APBC_REG(0x008) 24#define APBC_PXA168_GPIO APBC_REG(0x008)
25#define APBC_PXA168_PWM0 APBC_REG(0x00c) 25#define APBC_PXA168_PWM1 APBC_REG(0x00c)
26#define APBC_PXA168_PWM1 APBC_REG(0x010) 26#define APBC_PXA168_PWM2 APBC_REG(0x010)
27#define APBC_PXA168_PWM3 APBC_REG(0x014)
28#define APBC_PXA168_PWM4 APBC_REG(0x018)
27#define APBC_PXA168_SSP1 APBC_REG(0x01c) 29#define APBC_PXA168_SSP1 APBC_REG(0x01c)
28#define APBC_PXA168_SSP2 APBC_REG(0x020) 30#define APBC_PXA168_SSP2 APBC_REG(0x020)
29#define APBC_PXA168_RTC APBC_REG(0x028) 31#define APBC_PXA168_RTC APBC_REG(0x028)
@@ -48,10 +50,10 @@
48#define APBC_PXA910_UART0 APBC_REG(0x000) 50#define APBC_PXA910_UART0 APBC_REG(0x000)
49#define APBC_PXA910_UART1 APBC_REG(0x004) 51#define APBC_PXA910_UART1 APBC_REG(0x004)
50#define APBC_PXA910_GPIO APBC_REG(0x008) 52#define APBC_PXA910_GPIO APBC_REG(0x008)
51#define APBC_PXA910_PWM0 APBC_REG(0x00c) 53#define APBC_PXA910_PWM1 APBC_REG(0x00c)
52#define APBC_PXA910_PWM1 APBC_REG(0x010) 54#define APBC_PXA910_PWM2 APBC_REG(0x010)
53#define APBC_PXA910_PWM2 APBC_REG(0x014) 55#define APBC_PXA910_PWM3 APBC_REG(0x014)
54#define APBC_PXA910_PWM3 APBC_REG(0x018) 56#define APBC_PXA910_PWM4 APBC_REG(0x018)
55#define APBC_PXA910_SSP1 APBC_REG(0x01c) 57#define APBC_PXA910_SSP1 APBC_REG(0x01c)
56#define APBC_PXA910_SSP2 APBC_REG(0x020) 58#define APBC_PXA910_SSP2 APBC_REG(0x020)
57#define APBC_PXA910_IPC APBC_REG(0x024) 59#define APBC_PXA910_IPC APBC_REG(0x024)