aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-lpc32xx
diff options
context:
space:
mode:
authorKevin Wells <wellsk40@gmail.com>2010-09-16 09:18:50 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-10-12 23:37:37 -0400
commitbde435a9ca376d0b7809768ca803dbf14416b9c1 (patch)
treedd9678beb7c219922ad9b94db0e8f0a804ae2ab4 /arch/arm/mach-lpc32xx
parentfadcf49b9bd7ec5fb69befbf477e747d5b6a0328 (diff)
spi/pl022: Add spi->mode support to AMBA SPI driver
This patch adds spi->mode support for the AMBA pl022 driver and allows spidev to correctly alter SPI modes. Unused fields used in the pl022 header file for the pl022_config_chip have been removed. The ab8500 client driver selects the data transfer size instead of the platform data. For platforms that use the amba pl022 driver, the unused fields in the controller data structure have been removed and the .mode field in the SPI board info structure is used instead. Signed-off-by: Kevin Wells <wellsk40@gmail.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/mach-lpc32xx')
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index bc9a42da2145..0c936cf5675a 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control)
172} 172}
173 173
174static struct pl022_config_chip spi0_chip_info = { 174static struct pl022_config_chip spi0_chip_info = {
175 .lbm = LOOPBACK_DISABLED,
176 .com_mode = INTERRUPT_TRANSFER, 175 .com_mode = INTERRUPT_TRANSFER,
177 .iface = SSP_INTERFACE_MOTOROLA_SPI, 176 .iface = SSP_INTERFACE_MOTOROLA_SPI,
178 .hierarchy = SSP_MASTER, 177 .hierarchy = SSP_MASTER,
179 .slave_tx_disable = 0, 178 .slave_tx_disable = 0,
180 .endian_tx = SSP_TX_LSB,
181 .endian_rx = SSP_RX_LSB,
182 .data_size = SSP_DATA_BITS_8,
183 .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, 179 .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM,
184 .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, 180 .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC,
185 .clk_phase = SSP_CLK_FIRST_EDGE,
186 .clk_pol = SSP_CLK_POL_IDLE_LOW,
187 .ctrl_len = SSP_BITS_8, 181 .ctrl_len = SSP_BITS_8,
188 .wait_state = SSP_MWIRE_WAIT_ZERO, 182 .wait_state = SSP_MWIRE_WAIT_ZERO,
189 .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, 183 .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
@@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void)
239 .max_speed_hz = 5000000, 233 .max_speed_hz = 5000000,
240 .bus_num = 0, 234 .bus_num = 0,
241 .chip_select = 0, 235 .chip_select = 0,
236 .mode = SPI_MODE_0,
242 .platform_data = &eeprom, 237 .platform_data = &eeprom,
243 .controller_data = &spi0_chip_info, 238 .controller_data = &spi0_chip_info,
244 }, 239 },