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authorDeepak Saxena <dsaxena@plexity.net>2005-10-14 07:49:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-14 07:49:15 -0400
commitcb90d681ae439e525de9de519508ac9041342321 (patch)
treefb4ad4931318154171cc32e50b631ecb016ba641 /arch/arm/mach-l7200
parent6205d158d16d2619bf30f0aff47a8e09b07106e9 (diff)
[ARM] 2980/1: Fix L7200 core.c compile
Patch from Deepak Saxena This patch fixes L7200 so that it builds in 2.6.latest. I do not have the hardware so don't know if it actually still works, but the changes are fairly trivial. I am not even sure if anyone still maintains, uses, or cares about this machine type. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-l7200')
-rw-r--r--arch/arm/mach-l7200/core.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
index 5fd8c9f97f9a..03ed742ae2be 100644
--- a/arch/arm/mach-l7200/core.c
+++ b/arch/arm/mach-l7200/core.c
@@ -7,11 +7,17 @@
7 */ 7 */
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/device.h>
10 11
12#include <asm/types.h>
13#include <asm/irq.h>
14#include <asm/mach-types.h>
11#include <asm/hardware.h> 15#include <asm/hardware.h>
12#include <asm/page.h> 16#include <asm/page.h>
13 17
18#include <asm/mach/arch.h>
14#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20#include <asm/mach/irq.h>
15 21
16/* 22/*
17 * IRQ base register 23 * IRQ base register
@@ -47,6 +53,12 @@ static void l7200_unmask_irq(unsigned int irq)
47{ 53{
48 IRQ_ENABLE = 1 << irq; 54 IRQ_ENABLE = 1 << irq;
49} 55}
56
57static struct irqchip l7200_irq_chip = {
58 .ack = l7200_mask_irq,
59 .mask = l7200_mask_irq,
60 .unmask = l7200_unmask_irq
61};
50 62
51static void __init l7200_init_irq(void) 63static void __init l7200_init_irq(void)
52{ 64{
@@ -56,11 +68,9 @@ static void __init l7200_init_irq(void)
56 FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */ 68 FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */
57 69
58 for (irq = 0; irq < NR_IRQS; irq++) { 70 for (irq = 0; irq < NR_IRQS; irq++) {
59 irq_desc[irq].valid = 1; 71 set_irq_chip(irq, &l7200_irq_chip);
60 irq_desc[irq].probe_ok = 1; 72 set_irq_flags(irq, IRQF_VALID);
61 irq_desc[irq].mask_ack = l7200_mask_irq; 73 set_irq_handler(irq, do_level_IRQ);
62 irq_desc[irq].mask = l7200_mask_irq;
63 irq_desc[irq].unmask = l7200_unmask_irq;
64 } 74 }
65 75
66 init_FIQ(); 76 init_FIQ();