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authorAndrew Lunn <andrew@lunn.ch>2012-02-19 07:30:26 -0500
committerMike Turquette <mturquette@linaro.org>2012-05-08 19:34:02 -0400
commitc510182b1c68e2f2bf61e69f6c65bcf61a188809 (patch)
tree3617d1484e75974409f2b00d5d0a2f3836943cc3 /arch/arm/mach-kirkwood/common.c
parent1f80b126d06cf5c88b7f03a80c79ffd85053688a (diff)
ARM: Orion: XOR: Add support for clk
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-kirkwood/common.c')
-rw-r--r--arch/arm/mach-kirkwood/common.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b9b341ff91b4..ab27d06ac4a5 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -87,7 +87,7 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
87void __init kirkwood_clk_init(void) 87void __init kirkwood_clk_init(void)
88{ 88{
89 struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio; 89 struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
90 struct clk *crypto; 90 struct clk *crypto, *xor0, *xor1;
91 91
92 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 92 tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
93 CLK_IS_ROOT, kirkwood_tclk); 93 CLK_IS_ROOT, kirkwood_tclk);
@@ -100,8 +100,8 @@ void __init kirkwood_clk_init(void)
100 usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); 100 usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
101 sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); 101 sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
102 crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); 102 crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
103 kirkwood_register_gate("xor0", CGC_BIT_XOR0); 103 xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
104 kirkwood_register_gate("xor1", CGC_BIT_XOR1); 104 xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
105 kirkwood_register_gate("pex0", CGC_BIT_PEX0); 105 kirkwood_register_gate("pex0", CGC_BIT_PEX0);
106 kirkwood_register_gate("pex1", CGC_BIT_PEX1); 106 kirkwood_register_gate("pex1", CGC_BIT_PEX1);
107 kirkwood_register_gate("audio", CGC_BIT_AUDIO); 107 kirkwood_register_gate("audio", CGC_BIT_AUDIO);
@@ -120,6 +120,8 @@ void __init kirkwood_clk_init(void)
120 orion_clkdev_add(NULL, "orion_nand", runit); 120 orion_clkdev_add(NULL, "orion_nand", runit);
121 orion_clkdev_add(NULL, "mvsdio", sdio); 121 orion_clkdev_add(NULL, "mvsdio", sdio);
122 orion_clkdev_add(NULL, "mv_crypto", crypto); 122 orion_clkdev_add(NULL, "mv_crypto", crypto);
123 orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
124 orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
123} 125}
124 126
125/***************************************************************************** 127/*****************************************************************************
@@ -336,7 +338,6 @@ void __init kirkwood_crypto_init(void)
336void __init kirkwood_xor0_init(void) 338void __init kirkwood_xor0_init(void)
337{ 339{
338 kirkwood_clk_ctrl |= CGC_XOR0; 340 kirkwood_clk_ctrl |= CGC_XOR0;
339
340 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, 341 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
341 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); 342 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
342} 343}
@@ -348,7 +349,6 @@ void __init kirkwood_xor0_init(void)
348void __init kirkwood_xor1_init(void) 349void __init kirkwood_xor1_init(void)
349{ 350{
350 kirkwood_clk_ctrl |= CGC_XOR1; 351 kirkwood_clk_ctrl |= CGC_XOR1;
351
352 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, 352 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
353 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); 353 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
354} 354}