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authorArnd Bergmann <arnd@arndb.de>2012-09-28 17:36:10 -0400
committerJason Cooper <jason@lakedaemon.net>2012-11-21 22:36:45 -0500
commit0d2c9f0517e915ce03a04e91d3207827e0d274a8 (patch)
tree8bfdcf4eb216260aedbba6eddd6d8dc57f9004d9 /arch/arm/mach-ixp4xx/include/mach
parentb7b23db72f9a79e6ed0bcfb75d73b29f8e03fe62 (diff)
IXP4xx: use __iomem for MMIO
The ixp4xx queue manager uses "const struct qmgr_regs __iomem *" as the type for a pointer that is passed to __raw_writel, which is not allowed because of the const-ness. Dropping the 'const' keyword fixes the problem. While we're here, let's also drop the useless type cast. Without this patch, building ixp4xx_defconfig results in: In file included from arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:15:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' In file included from drivers/net/ethernet/xscale/ixp4xx_eth.c:41:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' arch/arm/mach-ixp4xx/ixp4xx_qmgr.c: In function 'qmgr_set_irq': arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:41:9: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Krzysztof HaƂasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach')
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 0a88d3b8e806..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
86 86
87static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
88{ 88{
89 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
90#if DEBUG_QMGR 90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92 92
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
99static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
100{ 100{
101 u32 val; 101 u32 val;
102 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
103 val = __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR 104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
112 112
113static inline int __qmgr_get_stat1(unsigned int queue) 113static inline int __qmgr_get_stat1(unsigned int queue)
114{ 114{
115 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) 116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
117 >> ((queue & 7) << 2)) & 0xF; 117 >> ((queue & 7) << 2)) & 0xF;
118} 118}
119 119
120static inline int __qmgr_get_stat2(unsigned int queue) 120static inline int __qmgr_get_stat2(unsigned int queue)
121{ 121{
122 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
123 BUG_ON(queue >= HALF_QUEUES); 123 BUG_ON(queue >= HALF_QUEUES);
124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) 124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
125 >> ((queue & 0xF) << 1)) & 0x3; 125 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
145 */ 145 */
146static inline int qmgr_stat_below_low_watermark(unsigned int queue) 146static inline int qmgr_stat_below_low_watermark(unsigned int queue)
147{ 147{
148 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
149 if (queue >= HALF_QUEUES) 149 if (queue >= HALF_QUEUES)
150 return (__raw_readl(&qmgr_regs->statne_h) >> 150 return (__raw_readl(&qmgr_regs->statne_h) >>
151 (queue - HALF_QUEUES)) & 0x01; 151 (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
172 */ 172 */
173static inline int qmgr_stat_full(unsigned int queue) 173static inline int qmgr_stat_full(unsigned int queue)
174{ 174{
175 const struct qmgr_regs __iomem *qmgr_regs = (void __iomem *)IXP4XX_QMGR_BASE_VIRT; 175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
176 if (queue >= HALF_QUEUES) 176 if (queue >= HALF_QUEUES)
177 return (__raw_readl(&qmgr_regs->statf_h) >> 177 return (__raw_readl(&qmgr_regs->statf_h) >>
178 (queue - HALF_QUEUES)) & 0x01; 178 (queue - HALF_QUEUES)) & 0x01;