diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-09 16:31:56 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-09 16:31:56 -0400 |
| commit | 6a4690c22f5da1eb1c898b61b6a80da52fbd976f (patch) | |
| tree | a03891a32abe0da191fb765fe669a597e07423c6 /arch/arm/mach-ixp2000/core.c | |
| parent | 90bb28b0644f7324f8bd1feb27b35146e6785ba2 (diff) | |
| parent | 8ec53663d2698076468b3e1edc4e1b418bd54de3 (diff) | |
Merge branch 'ptebits' into devel
Conflicts:
arch/arm/Kconfig
Diffstat (limited to 'arch/arm/mach-ixp2000/core.c')
| -rw-r--r-- | arch/arm/mach-ixp2000/core.c | 27 |
1 files changed, 10 insertions, 17 deletions
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index a6a4f93085fd..628063ca31e6 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
| @@ -84,64 +84,57 @@ static struct map_desc ixp2000_io_desc[] __initdata = { | |||
| 84 | .virtual = IXP2000_CAP_VIRT_BASE, | 84 | .virtual = IXP2000_CAP_VIRT_BASE, |
| 85 | .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), | 85 | .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), |
| 86 | .length = IXP2000_CAP_SIZE, | 86 | .length = IXP2000_CAP_SIZE, |
| 87 | .type = MT_DEVICE_IXP2000, | 87 | .type = MT_DEVICE, |
| 88 | }, { | 88 | }, { |
| 89 | .virtual = IXP2000_INTCTL_VIRT_BASE, | 89 | .virtual = IXP2000_INTCTL_VIRT_BASE, |
| 90 | .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), | 90 | .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), |
| 91 | .length = IXP2000_INTCTL_SIZE, | 91 | .length = IXP2000_INTCTL_SIZE, |
| 92 | .type = MT_DEVICE_IXP2000, | 92 | .type = MT_DEVICE, |
| 93 | }, { | 93 | }, { |
| 94 | .virtual = IXP2000_PCI_CREG_VIRT_BASE, | 94 | .virtual = IXP2000_PCI_CREG_VIRT_BASE, |
| 95 | .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), | 95 | .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), |
| 96 | .length = IXP2000_PCI_CREG_SIZE, | 96 | .length = IXP2000_PCI_CREG_SIZE, |
| 97 | .type = MT_DEVICE_IXP2000, | 97 | .type = MT_DEVICE, |
| 98 | }, { | 98 | }, { |
| 99 | .virtual = IXP2000_PCI_CSR_VIRT_BASE, | 99 | .virtual = IXP2000_PCI_CSR_VIRT_BASE, |
| 100 | .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), | 100 | .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), |
| 101 | .length = IXP2000_PCI_CSR_SIZE, | 101 | .length = IXP2000_PCI_CSR_SIZE, |
| 102 | .type = MT_DEVICE_IXP2000, | 102 | .type = MT_DEVICE, |
| 103 | }, { | 103 | }, { |
| 104 | .virtual = IXP2000_MSF_VIRT_BASE, | 104 | .virtual = IXP2000_MSF_VIRT_BASE, |
| 105 | .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), | 105 | .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), |
| 106 | .length = IXP2000_MSF_SIZE, | 106 | .length = IXP2000_MSF_SIZE, |
| 107 | .type = MT_DEVICE_IXP2000, | 107 | .type = MT_DEVICE, |
| 108 | }, { | 108 | }, { |
| 109 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, | 109 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, |
| 110 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), | 110 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), |
| 111 | .length = IXP2000_SCRATCH_RING_SIZE, | 111 | .length = IXP2000_SCRATCH_RING_SIZE, |
| 112 | .type = MT_DEVICE_IXP2000, | 112 | .type = MT_DEVICE, |
| 113 | }, { | 113 | }, { |
| 114 | .virtual = IXP2000_SRAM0_VIRT_BASE, | 114 | .virtual = IXP2000_SRAM0_VIRT_BASE, |
| 115 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), | 115 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), |
| 116 | .length = IXP2000_SRAM0_SIZE, | 116 | .length = IXP2000_SRAM0_SIZE, |
| 117 | .type = MT_DEVICE_IXP2000, | 117 | .type = MT_DEVICE, |
| 118 | }, { | 118 | }, { |
| 119 | .virtual = IXP2000_PCI_IO_VIRT_BASE, | 119 | .virtual = IXP2000_PCI_IO_VIRT_BASE, |
| 120 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), | 120 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), |
| 121 | .length = IXP2000_PCI_IO_SIZE, | 121 | .length = IXP2000_PCI_IO_SIZE, |
| 122 | .type = MT_DEVICE_IXP2000, | 122 | .type = MT_DEVICE, |
| 123 | }, { | 123 | }, { |
| 124 | .virtual = IXP2000_PCI_CFG0_VIRT_BASE, | 124 | .virtual = IXP2000_PCI_CFG0_VIRT_BASE, |
| 125 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), | 125 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), |
| 126 | .length = IXP2000_PCI_CFG0_SIZE, | 126 | .length = IXP2000_PCI_CFG0_SIZE, |
| 127 | .type = MT_DEVICE_IXP2000, | 127 | .type = MT_DEVICE, |
| 128 | }, { | 128 | }, { |
| 129 | .virtual = IXP2000_PCI_CFG1_VIRT_BASE, | 129 | .virtual = IXP2000_PCI_CFG1_VIRT_BASE, |
| 130 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), | 130 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), |
| 131 | .length = IXP2000_PCI_CFG1_SIZE, | 131 | .length = IXP2000_PCI_CFG1_SIZE, |
| 132 | .type = MT_DEVICE_IXP2000, | 132 | .type = MT_DEVICE, |
| 133 | } | 133 | } |
| 134 | }; | 134 | }; |
| 135 | 135 | ||
| 136 | void __init ixp2000_map_io(void) | 136 | void __init ixp2000_map_io(void) |
| 137 | { | 137 | { |
| 138 | /* | ||
| 139 | * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that | ||
| 140 | * XCB=101 (to avoid triggering erratum #66), and given that | ||
| 141 | * this mode speeds up I/O accesses and we have write buffer | ||
| 142 | * flushes in the right places anyway, it doesn't hurt to use | ||
| 143 | * XCB=101 for all IXP2000s. | ||
| 144 | */ | ||
| 145 | iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); | 138 | iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); |
| 146 | 139 | ||
| 147 | /* Set slowport to 8-bit mode. */ | 140 | /* Set slowport to 8-bit mode. */ |
