iop3xx: ATU and PCI memory configuration corrected

There are two 64 MB outbound memory windows at bus addresses
0x80000000..0x83ffffff and 0x84000000..0x87ffffff for PCI
memory. Currently, on iop32x, only the lower window is available for
allocations, limiting the available space to 64 MB. On iop33x the full
128 MB can be allocated, but the translation value is wrong for the
upper window.

The patch enables the full 128 MB space on iop32x and corrects the
initialization of OMWTVR1. Redundant definitions are deleted. Tested
using a Thecus N2100 board with a graphics adapter in the expansion
slot. Both windows are in use:

  00:05.0 VGA compatible controller: XGI Technology Inc. (eXtreme Graphics
  Innovation) Volari Z7 (prog-if 00 [VGA controller])
  [...]
	Region 0: Memory at 80000000 (32-bit, prefetchable) [size=64M]
	Region 1: Memory at 84080000 (32-bit, non-prefetchable) [size=256K]

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

1 files changed, 0 insertions, 2 deletions

diff --git a/arch/arm/mach-iop33x/include/mach/iop33x.h b/arch/arm/mach-iop33x/include/mach/iop33x.h
index 24567316ec88..a89c0a234bff 100644
--- a/arch/arm/mach-iop33x/include/mach/iop33x.h
+++ b/arch/arm/mach-iop33x/include/mach/iop33x.h
@@ -36,8 +36,6 @@
 #define IOP33X_MAX_RAM_SIZE             0x80000000UL
 #define IOP3XX_MAX_RAM_SIZE             IOP33X_MAX_RAM_SIZE
 #define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)
-#define IOP33X_PCI_MEM_WINDOW_SIZE      0x08000000
-#define IOP3XX_PCI_MEM_WINDOW_SIZE      IOP33X_PCI_MEM_WINDOW_SIZE
 
 
 #endif