[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
author: Russell King <rmk@dyn-67.arm.linux.org.uk> 2008-08-05 11:14:15 -0400
committer: Russell King <rmk+kernel@arm.linux.org.uk> 2008-08-07 04:55:48 -0400
commit: a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree: 69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-iop32x
parent: a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
25 files changed, 427 insertions, 11 deletions
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 9941395a5d00..3ad4696ade42 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -23,7 +23,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <asm/mach/arch.h>
@@ -31,7 +31,7 @@
 #include <asm/mach/pci.h>
 #include <asm/mach/time.h>
 #include <asm/mach-types.h>
-#include <asm/arch/time.h>
+#include <mach/time.h>
 static void __init em7210_timer_init(void)
 {
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 8761445ed040..45d61276d233 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -25,7 +25,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -34,7 +34,7 @@
 #include <asm/mach/time.h>
 #include <asm/mach-types.h>
 #include <asm/page.h>
-#include <asm/arch/time.h>
+#include <mach/time.h>
 /*
 * GLAN Tank timer tick configuration.
diff --git a/arch/arm/mach-iop32x/include/mach/adma.h b/arch/arm/mach-iop32x/include/mach/adma.h
new file mode 100644
index 000000000000..5ed92037dd10
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/adma.h
@@ -0,0 +1,5 @@
+#ifndef IOP32X_ADMA_H
+#define IOP32X_ADMA_H
+#include <asm/hardware/iop3xx-adma.h>
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S
new file mode 100644
index 000000000000..58b01664ffba
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S
@@ -0,0 +1,20 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+                .macro  addruart, rx
+                mov     \rx, #0xfe000000        @ physical as well as virtual
+                orr     \rx, \rx, #0x00800000   @ location of the UART
+                .endm
+#define UART_SHIFT      0
+#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-iop32x/include/mach/dma.h b/arch/arm/mach-iop32x/include/mach/dma.h
new file mode 100644
index 000000000000..f8bd817f205d
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/dma.h
@@ -0,0 +1,9 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/dma.h
+ *
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S
new file mode 100644
index 000000000000..b02fb56bafcc
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S
@@ -0,0 +1,36 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for IOP32x-based platforms
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <mach/iop32x.h>
+        .macro  disable_fiq
+        .endm
+        .macro get_irqnr_preamble, base, tmp
+        mrc     p15, 0, \tmp, c15, c1, 0
+        orr     \tmp, \tmp, #(1 << 6)
+        mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
+        mrc     p15, 0, \tmp, c15, c1, 0
+        mov     \tmp, \tmp
+        sub     pc, pc, #4                      @ cp_wait
+        .endm
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
+        cmp     \irqstat, #0
+        clzne   \irqnr, \irqstat
+        rsbne   \irqnr, \irqnr, #31
+        .endm
+        .macro arch_ret_to_user, tmp1, tmp2
+        mrc     p15, 0, \tmp1, c15, c1, 0
+        ands    \tmp2, \tmp1, #(1 << 6)
+        bicne   \tmp1, \tmp1, #(1 << 6)
+        mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
+        .endm
diff --git a/arch/arm/mach-iop32x/include/mach/glantank.h b/arch/arm/mach-iop32x/include/mach/glantank.h
new file mode 100644
index 000000000000..958eb91c0913
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/glantank.h
@@ -0,0 +1,13 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/glantank.h
+ *
+ * IO-Data GLAN Tank board registers
+ */
+#ifndef __GLANTANK_H
+#define __GLANTANK_H
+#define GLANTANK_UART           0xfe800000      /* UART */
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/gpio.h b/arch/arm/mach-iop32x/include/mach/gpio.h
new file mode 100644
index 000000000000..708f4ec9db1d
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/gpio.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_ARCH_IOP32X_GPIO_H
+#define __ASM_ARCH_IOP32X_GPIO_H
+#include <asm/hardware/iop3xx-gpio.h>
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/hardware.h b/arch/arm/mach-iop32x/include/mach/hardware.h
new file mode 100644
index 000000000000..d559c4e6095a
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/hardware.h
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/hardware.h
+ */
+#ifndef __HARDWARE_H
+#define __HARDWARE_H
+#include <asm/types.h>
+/*
+ * Note about PCI IO space mappings
+ *
+ * To make IO space accesses efficient, we store virtual addresses in
+ * the IO resources.
+ *
+ * The PCI IO space is located at virtual 0xfe000000 from physical
+ * 0x90000000. The PCI BARs must be programmed with physical addresses,
+ * but when we read them, we convert them to virtual addresses. See
+ * arch/arm/plat-iop/pci.c.
+ */
+#define pcibios_assign_all_busses() 1
+#define PCIBIOS_MIN_IO          0x00000000
+#define PCIBIOS_MIN_MEM         0x00000000
+#ifndef __ASSEMBLY__
+void iop32x_init_irq(void);
+#endif
+/*
+ * Generic chipset bits
+ */
+#include "iop32x.h"
+/*
+ * Board specific bits
+ */
+#include "glantank.h"
+#include "iq80321.h"
+#include "iq31244.h"
+#include "n2100.h"
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
new file mode 100644
index 000000000000..ce54705ba3d4
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/io.h
+ *
+ * Copyright (C) 2001 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __IO_H
+#define __IO_H
+#include <mach/hardware.h>
+extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
+        unsigned int mtype);
+extern void __iop3xx_iounmap(void __iomem *addr);
+#define IO_SPACE_LIMIT          0xffffffff
+#define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
+#define __mem_pci(a)            (a)
+#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f)
+#define __arch_iounmap(a)        __iop3xx_iounmap(a)
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/iop32x.h b/arch/arm/mach-iop32x/include/mach/iop32x.h
new file mode 100644
index 000000000000..abd9eb49f103
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/iop32x.h
@@ -0,0 +1,37 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/iop32x.h
+ *
+ * Intel IOP32X Chip definitions
+ *
+ * Author: Rory Bolt <rorybolt@pacbell.net>
+ * Copyright (C) 2002 Rory Bolt
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __IOP32X_H
+#define __IOP32X_H
+/*
+ * Peripherals that are shared between the iop32x and iop33x but
+ * located at different addresses.
+ */
+#define IOP3XX_GPIO_REG(reg)    (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
+#define IOP3XX_TIMER_REG(reg)   (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
+#include <asm/hardware/iop3xx.h>
+/* ATU Parameters
+ * set up a 1:1 bus to physical ram relationship
+ * w/ physical ram on top of pci in the memory map
+ */
+#define IOP32X_MAX_RAM_SIZE            0x40000000UL
+#define IOP3XX_MAX_RAM_SIZE            IOP32X_MAX_RAM_SIZE
+#define IOP3XX_PCI_LOWER_MEM_BA        0x80000000
+#define IOP32X_PCI_MEM_WINDOW_SIZE     0x04000000
+#define IOP3XX_PCI_MEM_WINDOW_SIZE     IOP32X_PCI_MEM_WINDOW_SIZE
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/iq31244.h b/arch/arm/mach-iop32x/include/mach/iq31244.h
new file mode 100644
index 000000000000..6b6b369e781c
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/iq31244.h
@@ -0,0 +1,17 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/iq31244.h
+ *
+ * Intel IQ31244 evaluation board registers
+ */
+#ifndef __IQ31244_H
+#define __IQ31244_H
+#define IQ31244_UART            0xfe800000      /* UART #1 */
+#define IQ31244_7SEG_1          0xfe840000      /* 7-Segment MSB */
+#define IQ31244_7SEG_0          0xfe850000      /* 7-Segment LSB (WO) */
+#define IQ31244_ROTARY_SW       0xfe8d0000      /* Rotary Switch */
+#define IQ31244_BATT_STAT       0xfe8f0000      /* Battery Status */
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/iq80321.h b/arch/arm/mach-iop32x/include/mach/iq80321.h
new file mode 100644
index 000000000000..498819b737e7
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/iq80321.h
@@ -0,0 +1,17 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/iq80321.h
+ *
+ * Intel IQ80321 evaluation board registers
+ */
+#ifndef __IQ80321_H
+#define __IQ80321_H
+#define IQ80321_UART            0xfe800000      /* UART #1 */
+#define IQ80321_7SEG_1          0xfe840000      /* 7-Segment MSB */
+#define IQ80321_7SEG_0          0xfe850000      /* 7-Segment LSB (WO) */
+#define IQ80321_ROTARY_SW       0xfe8d0000      /* Rotary Switch */
+#define IQ80321_BATT_STAT       0xfe8f0000      /* Battery Status */
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/irqs.h b/arch/arm/mach-iop32x/include/mach/irqs.h
new file mode 100644
index 000000000000..33573e09914c
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/irqs.h
@@ -0,0 +1,50 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/irqs.h
+ *
+ * Author:      Rory Bolt <rorybolt@pacbell.net>
+ * Copyright:   (C) 2002 Rory Bolt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __IRQS_H
+#define __IRQS_H
+/*
+ * IOP80321 chipset interrupts
+ */
+#define IRQ_IOP32X_DMA0_EOT     0
+#define IRQ_IOP32X_DMA0_EOC     1
+#define IRQ_IOP32X_DMA1_EOT     2
+#define IRQ_IOP32X_DMA1_EOC     3
+#define IRQ_IOP32X_AA_EOT       6
+#define IRQ_IOP32X_AA_EOC       7
+#define IRQ_IOP32X_CORE_PMON    8
+#define IRQ_IOP32X_TIMER0       9
+#define IRQ_IOP32X_TIMER1       10
+#define IRQ_IOP32X_I2C_0        11
+#define IRQ_IOP32X_I2C_1        12
+#define IRQ_IOP32X_MESSAGING    13
+#define IRQ_IOP32X_ATU_BIST     14
+#define IRQ_IOP32X_PERFMON      15
+#define IRQ_IOP32X_CORE_PMU     16
+#define IRQ_IOP32X_BIU_ERR      17
+#define IRQ_IOP32X_ATU_ERR      18
+#define IRQ_IOP32X_MCU_ERR      19
+#define IRQ_IOP32X_DMA0_ERR     20
+#define IRQ_IOP32X_DMA1_ERR     21
+#define IRQ_IOP32X_AA_ERR       23
+#define IRQ_IOP32X_MSG_ERR      24
+#define IRQ_IOP32X_SSP          25
+#define IRQ_IOP32X_XINT0        27
+#define IRQ_IOP32X_XINT1        28
+#define IRQ_IOP32X_XINT2        29
+#define IRQ_IOP32X_XINT3        30
+#define IRQ_IOP32X_HPI          31
+#define NR_IRQS                 32
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h
new file mode 100644
index 000000000000..42cd4bf3148c
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/memory.h
@@ -0,0 +1,26 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/memory.h
+ */
+#ifndef __MEMORY_H
+#define __MEMORY_H
+#include <mach/hardware.h>
+/*
+ * Physical DRAM offset.
+ */
+#define PHYS_OFFSET     UL(0xa0000000)
+/*
+ * Virtual view <-> PCI DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *              address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *              to an address that the kernel can use.
+ */
+#define __virt_to_bus(x)        (__virt_to_phys(x))
+#define __bus_to_virt(x)        (__phys_to_virt(x))
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/n2100.h b/arch/arm/mach-iop32x/include/mach/n2100.h
new file mode 100644
index 000000000000..40b8a532b064
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/n2100.h
@@ -0,0 +1,19 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/n2100.h
+ *
+ * Thecus N2100 board registers
+ */
+#ifndef __N2100_H
+#define __N2100_H
+#define N2100_UART              0xfe800000      /* UART */
+#define N2100_COPY_BUTTON       IOP3XX_GPIO_LINE(0)
+#define N2100_PCA9532_RESET     IOP3XX_GPIO_LINE(2)
+#define N2100_RESET_BUTTON      IOP3XX_GPIO_LINE(3)
+#define N2100_HARDWARE_RESET    IOP3XX_GPIO_LINE(4)
+#define N2100_POWER_BUTTON      IOP3XX_GPIO_LINE(5)
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
new file mode 100644
index 000000000000..20f923e54f46
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/system.h
+ *
+ * Copyright (C) 2001 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/mach-types.h>
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+static inline void arch_reset(char mode)
+{
+        local_irq_disable();
+        if (machine_is_n2100()) {
+                gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
+                gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
+                while (1)
+                        ;
+        }
+        *IOP3XX_PCSR = 0x30;
+        /* Jump into ROM at address 0 */
+        cpu_reset(0);
+}
diff --git a/arch/arm/mach-iop32x/include/mach/time.h b/arch/arm/mach-iop32x/include/mach/time.h
new file mode 100644
index 000000000000..0f28c9949623
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/time.h
@@ -0,0 +1,4 @@
+#ifndef _IOP32X_TIME_H_
+#define _IOP32X_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
+#endif
diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h
new file mode 100644
index 000000000000..a541afced3cb
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/timex.h
@@ -0,0 +1,9 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/timex.h
+ *
+ * IOP32x architecture timex specifications
+ */
+#include <mach/hardware.h>
+#define CLOCK_TICK_RATE         (100 * HZ)
diff --git a/arch/arm/mach-iop32x/include/mach/uncompress.h b/arch/arm/mach-iop32x/include/mach/uncompress.h
new file mode 100644
index 000000000000..b247551b6f5a
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/uncompress.h
@@ -0,0 +1,39 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/uncompress.h
+ */
+#include <asm/types.h>
+#include <asm/mach-types.h>
+#include <linux/serial_reg.h>
+#include <mach/hardware.h>
+static volatile u8 *uart_base;
+#define TX_DONE         (UART_LSR_TEMT | UART_LSR_THRE)
+static inline void putc(char c)
+{
+        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
+                barrier();
+        uart_base[UART_TX] = c;
+}
+static inline void flush(void)
+{
+}
+static __inline__ void __arch_decomp_setup(unsigned long arch_id)
+{
+        if (machine_is_iq80321())
+                uart_base = (volatile u8 *)IQ80321_UART;
+        else if (machine_is_iq31244() || machine_is_em7210())
+                uart_base = (volatile u8 *)IQ31244_UART;
+        else
+                uart_base = (volatile u8 *)0xfe800000;
+}
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()     __arch_decomp_setup(arch_id)
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h
new file mode 100644
index 000000000000..85ceb09d85f0
--- /dev/null
+++ b/arch/arm/mach-iop32x/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-iop32x/include/mach/vmalloc.h
+ */
+#define VMALLOC_END     0xfe000000
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 5a4e951cad9e..082818aaa205 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -26,7 +26,7 @@
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -36,7 +36,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/arch/time.h>
+#include <mach/time.h>
 /*
 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 1c098c507c66..d735539808b4 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -23,7 +23,7 @@
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -33,7 +33,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/arch/time.h>
+#include <mach/time.h>
 /*
 * IQ80321 timer tick configuration.
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index 2ea1e716296f..ba59b2d17db1 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -16,7 +16,7 @@
 #include <linux/list.h>
 #include <asm/mach/irq.h>
 #include <asm/irq.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 static u32 iop32x_mask;
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index f38dc19bbcc9..3173f9c5835d 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -30,7 +30,7 @@
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/reboot.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -40,7 +40,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/arch/time.h>
+#include <mach/time.h>
 /*
 * N2100 timer tick configuration.
author	Russell King <rmk@dyn-67.arm.linux.org.uk>	2008-08-05 11:14:15 -0400
committer	Russell King <rmk+kernel@arm.linux.org.uk>	2008-08-07 04:55:48 -0400
commit	a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree	69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-iop32x
parent	a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)

diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 9941395a5d00..3ad4696ade42 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c
@@ -23,7 +23,7 @@
23	#include <linux/mtd/physmap.h>	23	#include <linux/mtd/physmap.h>
24	#include <linux/platform_device.h>	24	#include <linux/platform_device.h>
25	#include <linux/i2c.h>	25	#include <linux/i2c.h>
26	#include <asm/arch/hardware.h>	26	#include <mach/hardware.h>
27	#include <linux/io.h>	27	#include <linux/io.h>
28	#include <linux/irq.h>	28	#include <linux/irq.h>
29	#include <asm/mach/arch.h>	29	#include <asm/mach/arch.h>
@@ -31,7 +31,7 @@
31	#include <asm/mach/pci.h>	31	#include <asm/mach/pci.h>
32	#include <asm/mach/time.h>	32	#include <asm/mach/time.h>
33	#include <asm/mach-types.h>	33	#include <asm/mach-types.h>
34	#include <asm/arch/time.h>	34	#include <mach/time.h>
35		35
36	static void __init em7210_timer_init(void)	36	static void __init em7210_timer_init(void)
37	{	37	{


diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 8761445ed040..45d61276d233 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c
@@ -25,7 +25,7 @@
25	#include <linux/mtd/physmap.h>	25	#include <linux/mtd/physmap.h>
26	#include <linux/i2c.h>	26	#include <linux/i2c.h>
27	#include <linux/platform_device.h>	27	#include <linux/platform_device.h>
28	#include <asm/arch/hardware.h>	28	#include <mach/hardware.h>
29	#include <asm/io.h>	29	#include <asm/io.h>
30	#include <asm/irq.h>	30	#include <asm/irq.h>
31	#include <asm/mach/arch.h>	31	#include <asm/mach/arch.h>
@@ -34,7 +34,7 @@
34	#include <asm/mach/time.h>	34	#include <asm/mach/time.h>
35	#include <asm/mach-types.h>	35	#include <asm/mach-types.h>
36	#include <asm/page.h>	36	#include <asm/page.h>
37	#include <asm/arch/time.h>	37	#include <mach/time.h>
38		38
39	/*	39	/*
40	* GLAN Tank timer tick configuration.	40	* GLAN Tank timer tick configuration.


diff --git a/arch/arm/mach-iop32x/include/mach/adma.h b/arch/arm/mach-iop32x/include/mach/adma.h new file mode 100644 index 000000000000..5ed92037dd10 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/adma.h
@@ -0,0 +1,5 @@
		1	#ifndef IOP32X_ADMA_H
		2	#define IOP32X_ADMA_H
		3	#include <asm/hardware/iop3xx-adma.h>
		4	#endif
		5


diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S new file mode 100644 index 000000000000..58b01664ffba --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S
@@ -0,0 +1,20 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/debug-macro.S
		3	*
		4	* Debugging macro include header
		5	*
		6	* Copyright (C) 1994-1999 Russell King
		7	* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
		8	*
		9	* This program is free software; you can redistribute it and/or modify
		10	* it under the terms of the GNU General Public License version 2 as
		11	* published by the Free Software Foundation.
		12	*/
		13
		14	.macro addruart, rx
		15	mov \rx, #0xfe000000 @ physical as well as virtual
		16	orr \rx, \rx, #0x00800000 @ location of the UART
		17	.endm
		18
		19	#define UART_SHIFT 0
		20	#include <asm/hardware/debug-8250.S>


diff --git a/arch/arm/mach-iop32x/include/mach/dma.h b/arch/arm/mach-iop32x/include/mach/dma.h new file mode 100644 index 000000000000..f8bd817f205d --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/dma.h
@@ -0,0 +1,9 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/dma.h
		3	*
		4	* Copyright (C) 2004 Intel Corp.
		5	*
		6	* This program is free software; you can redistribute it and/or modify
		7	* it under the terms of the GNU General Public License version 2 as
		8	* published by the Free Software Foundation.
		9	*/


diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S new file mode 100644 index 000000000000..b02fb56bafcc --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S
@@ -0,0 +1,36 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/entry-macro.S
		3	*
		4	* Low-level IRQ helper macros for IOP32x-based platforms
		5	*
		6	* This file is licensed under the terms of the GNU General Public
		7	* License version 2. This program is licensed "as is" without any
		8	* warranty of any kind, whether express or implied.
		9	*/
		10	#include <mach/iop32x.h>
		11
		12	.macro disable_fiq
		13	.endm
		14
		15	.macro get_irqnr_preamble, base, tmp
		16	mrc p15, 0, \tmp, c15, c1, 0
		17	orr \tmp, \tmp, #(1 << 6)
		18	mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
		19	mrc p15, 0, \tmp, c15, c1, 0
		20	mov \tmp, \tmp
		21	sub pc, pc, #4 @ cp_wait
		22	.endm
		23
		24	.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
		25	mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
		26	cmp \irqstat, #0
		27	clzne \irqnr, \irqstat
		28	rsbne \irqnr, \irqnr, #31
		29	.endm
		30
		31	.macro arch_ret_to_user, tmp1, tmp2
		32	mrc p15, 0, \tmp1, c15, c1, 0
		33	ands \tmp2, \tmp1, #(1 << 6)
		34	bicne \tmp1, \tmp1, #(1 << 6)
		35	mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
		36	.endm


diff --git a/arch/arm/mach-iop32x/include/mach/glantank.h b/arch/arm/mach-iop32x/include/mach/glantank.h new file mode 100644 index 000000000000..958eb91c0913 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/glantank.h
@@ -0,0 +1,13 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/glantank.h
		3	*
		4	* IO-Data GLAN Tank board registers
		5	*/
		6
		7	#ifndef __GLANTANK_H
		8	#define __GLANTANK_H
		9
		10	#define GLANTANK_UART 0xfe800000 /* UART */
		11
		12
		13	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/gpio.h b/arch/arm/mach-iop32x/include/mach/gpio.h new file mode 100644 index 000000000000..708f4ec9db1d --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/gpio.h
@@ -0,0 +1,6 @@
		1	#ifndef __ASM_ARCH_IOP32X_GPIO_H
		2	#define __ASM_ARCH_IOP32X_GPIO_H
		3
		4	#include <asm/hardware/iop3xx-gpio.h>
		5
		6	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/hardware.h b/arch/arm/mach-iop32x/include/mach/hardware.h new file mode 100644 index 000000000000..d559c4e6095a --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/hardware.h
@@ -0,0 +1,44 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/hardware.h
		3	*/
		4
		5	#ifndef __HARDWARE_H
		6	#define __HARDWARE_H
		7
		8	#include <asm/types.h>
		9
		10	/*
		11	* Note about PCI IO space mappings
		12	*
		13	* To make IO space accesses efficient, we store virtual addresses in
		14	* the IO resources.
		15	*
		16	* The PCI IO space is located at virtual 0xfe000000 from physical
		17	* 0x90000000. The PCI BARs must be programmed with physical addresses,
		18	* but when we read them, we convert them to virtual addresses. See
		19	* arch/arm/plat-iop/pci.c.
		20	*/
		21	#define pcibios_assign_all_busses() 1
		22	#define PCIBIOS_MIN_IO 0x00000000
		23	#define PCIBIOS_MIN_MEM 0x00000000
		24
		25	#ifndef __ASSEMBLY__
		26	void iop32x_init_irq(void);
		27	#endif
		28
		29
		30	/*
		31	* Generic chipset bits
		32	*/
		33	#include "iop32x.h"
		34
		35	/*
		36	* Board specific bits
		37	*/
		38	#include "glantank.h"
		39	#include "iq80321.h"
		40	#include "iq31244.h"
		41	#include "n2100.h"
		42
		43
		44	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h new file mode 100644 index 000000000000..ce54705ba3d4 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -0,0 +1,27 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/io.h
		3	*
		4	* Copyright (C) 2001 MontaVista Software, Inc.
		5	*
		6	* This program is free software; you can redistribute it and/or modify
		7	* it under the terms of the GNU General Public License version 2 as
		8	* published by the Free Software Foundation.
		9	*/
		10
		11	#ifndef __IO_H
		12	#define __IO_H
		13
		14	#include <mach/hardware.h>
		15
		16	extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
		17	unsigned int mtype);
		18	extern void __iop3xx_iounmap(void __iomem *addr);
		19
		20	#define IO_SPACE_LIMIT 0xffffffff
		21	#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
		22	#define __mem_pci(a) (a)
		23
		24	#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f)
		25	#define __arch_iounmap(a) __iop3xx_iounmap(a)
		26
		27	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/iop32x.h b/arch/arm/mach-iop32x/include/mach/iop32x.h new file mode 100644 index 000000000000..abd9eb49f103 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/iop32x.h
@@ -0,0 +1,37 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/iop32x.h
		3	*
		4	* Intel IOP32X Chip definitions
		5	*
		6	* Author: Rory Bolt <rorybolt@pacbell.net>
		7	* Copyright (C) 2002 Rory Bolt
		8	* Copyright (C) 2004 Intel Corp.
		9	*
		10	* This program is free software; you can redistribute it and/or modify
		11	* it under the terms of the GNU General Public License version 2 as
		12	* published by the Free Software Foundation.
		13	*/
		14
		15	#ifndef __IOP32X_H
		16	#define __IOP32X_H
		17
		18	/*
		19	* Peripherals that are shared between the iop32x and iop33x but
		20	* located at different addresses.
		21	*/
		22	#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
		23	#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
		24
		25	#include <asm/hardware/iop3xx.h>
		26
		27	/* ATU Parameters
		28	* set up a 1:1 bus to physical ram relationship
		29	* w/ physical ram on top of pci in the memory map
		30	*/
		31	#define IOP32X_MAX_RAM_SIZE 0x40000000UL
		32	#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE
		33	#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000
		34	#define IOP32X_PCI_MEM_WINDOW_SIZE 0x04000000
		35	#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP32X_PCI_MEM_WINDOW_SIZE
		36
		37	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/iq31244.h b/arch/arm/mach-iop32x/include/mach/iq31244.h new file mode 100644 index 000000000000..6b6b369e781c --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/iq31244.h
@@ -0,0 +1,17 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/iq31244.h
		3	*
		4	* Intel IQ31244 evaluation board registers
		5	*/
		6
		7	#ifndef __IQ31244_H
		8	#define __IQ31244_H
		9
		10	#define IQ31244_UART 0xfe800000 /* UART #1 */
		11	#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
		12	#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
		13	#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
		14	#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
		15
		16
		17	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/iq80321.h b/arch/arm/mach-iop32x/include/mach/iq80321.h new file mode 100644 index 000000000000..498819b737e7 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/iq80321.h
@@ -0,0 +1,17 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/iq80321.h
		3	*
		4	* Intel IQ80321 evaluation board registers
		5	*/
		6
		7	#ifndef __IQ80321_H
		8	#define __IQ80321_H
		9
		10	#define IQ80321_UART 0xfe800000 /* UART #1 */
		11	#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */
		12	#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
		13	#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
		14	#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */
		15
		16
		17	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/irqs.h b/arch/arm/mach-iop32x/include/mach/irqs.h new file mode 100644 index 000000000000..33573e09914c --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/irqs.h
@@ -0,0 +1,50 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/irqs.h
		3	*
		4	* Author: Rory Bolt <rorybolt@pacbell.net>
		5	* Copyright: (C) 2002 Rory Bolt
		6	*
		7	* This program is free software; you can redistribute it and/or modify
		8	* it under the terms of the GNU General Public License version 2 as
		9	* published by the Free Software Foundation.
		10	*/
		11
		12	#ifndef __IRQS_H
		13	#define __IRQS_H
		14
		15	/*
		16	* IOP80321 chipset interrupts
		17	*/
		18	#define IRQ_IOP32X_DMA0_EOT 0
		19	#define IRQ_IOP32X_DMA0_EOC 1
		20	#define IRQ_IOP32X_DMA1_EOT 2
		21	#define IRQ_IOP32X_DMA1_EOC 3
		22	#define IRQ_IOP32X_AA_EOT 6
		23	#define IRQ_IOP32X_AA_EOC 7
		24	#define IRQ_IOP32X_CORE_PMON 8
		25	#define IRQ_IOP32X_TIMER0 9
		26	#define IRQ_IOP32X_TIMER1 10
		27	#define IRQ_IOP32X_I2C_0 11
		28	#define IRQ_IOP32X_I2C_1 12
		29	#define IRQ_IOP32X_MESSAGING 13
		30	#define IRQ_IOP32X_ATU_BIST 14
		31	#define IRQ_IOP32X_PERFMON 15
		32	#define IRQ_IOP32X_CORE_PMU 16
		33	#define IRQ_IOP32X_BIU_ERR 17
		34	#define IRQ_IOP32X_ATU_ERR 18
		35	#define IRQ_IOP32X_MCU_ERR 19
		36	#define IRQ_IOP32X_DMA0_ERR 20
		37	#define IRQ_IOP32X_DMA1_ERR 21
		38	#define IRQ_IOP32X_AA_ERR 23
		39	#define IRQ_IOP32X_MSG_ERR 24
		40	#define IRQ_IOP32X_SSP 25
		41	#define IRQ_IOP32X_XINT0 27
		42	#define IRQ_IOP32X_XINT1 28
		43	#define IRQ_IOP32X_XINT2 29
		44	#define IRQ_IOP32X_XINT3 30
		45	#define IRQ_IOP32X_HPI 31
		46
		47	#define NR_IRQS 32
		48
		49
		50	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h new file mode 100644 index 000000000000..42cd4bf3148c --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/memory.h
@@ -0,0 +1,26 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/memory.h
		3	*/
		4
		5	#ifndef __MEMORY_H
		6	#define __MEMORY_H
		7
		8	#include <mach/hardware.h>
		9
		10	/*
		11	* Physical DRAM offset.
		12	*/
		13	#define PHYS_OFFSET UL(0xa0000000)
		14
		15	/*
		16	* Virtual view <-> PCI DMA view memory address translations
		17	* virt_to_bus: Used to translate the virtual address to an
		18	* address suitable to be passed to set_dma_addr
		19	* bus_to_virt: Used to convert an address for DMA operations
		20	* to an address that the kernel can use.
		21	*/
		22	#define __virt_to_bus(x) (__virt_to_phys(x))
		23	#define __bus_to_virt(x) (__phys_to_virt(x))
		24
		25
		26	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/n2100.h b/arch/arm/mach-iop32x/include/mach/n2100.h new file mode 100644 index 000000000000..40b8a532b064 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/n2100.h
@@ -0,0 +1,19 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/n2100.h
		3	*
		4	* Thecus N2100 board registers
		5	*/
		6
		7	#ifndef __N2100_H
		8	#define __N2100_H
		9
		10	#define N2100_UART 0xfe800000 /* UART */
		11
		12	#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0)
		13	#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2)
		14	#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3)
		15	#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4)
		16	#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5)
		17
		18
		19	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h new file mode 100644 index 000000000000..20f923e54f46 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -0,0 +1,33 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/system.h
		3	*
		4	* Copyright (C) 2001 MontaVista Software, Inc.
		5	*
		6	* This program is free software; you can redistribute it and/or modify
		7	* it under the terms of the GNU General Public License version 2 as
		8	* published by the Free Software Foundation.
		9	*/
		10
		11	#include <asm/mach-types.h>
		12
		13	static inline void arch_idle(void)
		14	{
		15	cpu_do_idle();
		16	}
		17
		18	static inline void arch_reset(char mode)
		19	{
		20	local_irq_disable();
		21
		22	if (machine_is_n2100()) {
		23	gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
		24	gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
		25	while (1)
		26	;
		27	}
		28
		29	*IOP3XX_PCSR = 0x30;
		30
		31	/* Jump into ROM at address 0 */
		32	cpu_reset(0);
		33	}


diff --git a/arch/arm/mach-iop32x/include/mach/time.h b/arch/arm/mach-iop32x/include/mach/time.h new file mode 100644 index 000000000000..0f28c9949623 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/time.h
@@ -0,0 +1,4 @@
		1	#ifndef _IOP32X_TIME_H_
		2	#define _IOP32X_TIME_H_
		3	#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
		4	#endif


diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h new file mode 100644 index 000000000000..a541afced3cb --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/timex.h
@@ -0,0 +1,9 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/timex.h
		3	*
		4	* IOP32x architecture timex specifications
		5	*/
		6
		7	#include <mach/hardware.h>
		8
		9	#define CLOCK_TICK_RATE (100 * HZ)


diff --git a/arch/arm/mach-iop32x/include/mach/uncompress.h b/arch/arm/mach-iop32x/include/mach/uncompress.h new file mode 100644 index 000000000000..b247551b6f5a --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/uncompress.h
@@ -0,0 +1,39 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/uncompress.h
		3	*/
		4
		5	#include <asm/types.h>
		6	#include <asm/mach-types.h>
		7	#include <linux/serial_reg.h>
		8	#include <mach/hardware.h>
		9
		10	static volatile u8 *uart_base;
		11
		12	#define TX_DONE (UART_LSR_TEMT \| UART_LSR_THRE)
		13
		14	static inline void putc(char c)
		15	{
		16	while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
		17	barrier();
		18	uart_base[UART_TX] = c;
		19	}
		20
		21	static inline void flush(void)
		22	{
		23	}
		24
		25	static __inline__ void __arch_decomp_setup(unsigned long arch_id)
		26	{
		27	if (machine_is_iq80321())
		28	uart_base = (volatile u8 *)IQ80321_UART;
		29	else if (machine_is_iq31244() \|\| machine_is_em7210())
		30	uart_base = (volatile u8 *)IQ31244_UART;
		31	else
		32	uart_base = (volatile u8 *)0xfe800000;
		33	}
		34
		35	/*
		36	* nothing to do
		37	*/
		38	#define arch_decomp_setup() __arch_decomp_setup(arch_id)
		39	#define arch_decomp_wdog()


diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h new file mode 100644 index 000000000000..85ceb09d85f0 --- /dev/null +++ b/arch/arm/mach-iop32x/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
		1	/*
		2	* arch/arm/mach-iop32x/include/mach/vmalloc.h
		3	*/
		4
		5	#define VMALLOC_END 0xfe000000


diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 5a4e951cad9e..082818aaa205 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c
@@ -26,7 +26,7 @@
26	#include <linux/serial_8250.h>	26	#include <linux/serial_8250.h>
27	#include <linux/mtd/physmap.h>	27	#include <linux/mtd/physmap.h>
28	#include <linux/platform_device.h>	28	#include <linux/platform_device.h>
29	#include <asm/arch/hardware.h>	29	#include <mach/hardware.h>
30	#include <asm/io.h>	30	#include <asm/io.h>
31	#include <asm/irq.h>	31	#include <asm/irq.h>
32	#include <asm/mach/arch.h>	32	#include <asm/mach/arch.h>
@@ -36,7 +36,7 @@
36	#include <asm/mach-types.h>	36	#include <asm/mach-types.h>
37	#include <asm/page.h>	37	#include <asm/page.h>
38	#include <asm/pgtable.h>	38	#include <asm/pgtable.h>
39	#include <asm/arch/time.h>	39	#include <mach/time.h>
40		40
41	/*	41	/*
42	* Until March of 2007 iq31244 platforms and ep80219 platforms shared the	42	* Until March of 2007 iq31244 platforms and ep80219 platforms shared the


diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 1c098c507c66..d735539808b4 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c
@@ -23,7 +23,7 @@
23	#include <linux/serial_8250.h>	23	#include <linux/serial_8250.h>
24	#include <linux/mtd/physmap.h>	24	#include <linux/mtd/physmap.h>
25	#include <linux/platform_device.h>	25	#include <linux/platform_device.h>
26	#include <asm/arch/hardware.h>	26	#include <mach/hardware.h>
27	#include <asm/io.h>	27	#include <asm/io.h>
28	#include <asm/irq.h>	28	#include <asm/irq.h>
29	#include <asm/mach/arch.h>	29	#include <asm/mach/arch.h>
@@ -33,7 +33,7 @@
33	#include <asm/mach-types.h>	33	#include <asm/mach-types.h>
34	#include <asm/page.h>	34	#include <asm/page.h>
35	#include <asm/pgtable.h>	35	#include <asm/pgtable.h>
36	#include <asm/arch/time.h>	36	#include <mach/time.h>
37		37
38	/*	38	/*
39	* IQ80321 timer tick configuration.	39	* IQ80321 timer tick configuration.


diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index 2ea1e716296f..ba59b2d17db1 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c
@@ -16,7 +16,7 @@
16	#include <linux/list.h>	16	#include <linux/list.h>
17	#include <asm/mach/irq.h>	17	#include <asm/mach/irq.h>
18	#include <asm/irq.h>	18	#include <asm/irq.h>
19	#include <asm/arch/hardware.h>	19	#include <mach/hardware.h>
20	#include <asm/mach-types.h>	20	#include <asm/mach-types.h>
21		21
22	static u32 iop32x_mask;	22	static u32 iop32x_mask;


diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index f38dc19bbcc9..3173f9c5835d 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c
@@ -30,7 +30,7 @@
30	#include <linux/i2c.h>	30	#include <linux/i2c.h>
31	#include <linux/platform_device.h>	31	#include <linux/platform_device.h>
32	#include <linux/reboot.h>	32	#include <linux/reboot.h>
33	#include <asm/arch/hardware.h>	33	#include <mach/hardware.h>
34	#include <asm/io.h>	34	#include <asm/io.h>
35	#include <asm/irq.h>	35	#include <asm/irq.h>
36	#include <asm/mach/arch.h>	36	#include <asm/mach/arch.h>
@@ -40,7 +40,7 @@
40	#include <asm/mach-types.h>	40	#include <asm/mach-types.h>
41	#include <asm/page.h>	41	#include <asm/page.h>
42	#include <asm/pgtable.h>	42	#include <asm/pgtable.h>
43	#include <asm/arch/time.h>	43	#include <mach/time.h>
44		44
45	/*	45	/*
46	* N2100 timer tick configuration.	46	* N2100 timer tick configuration.