ARM: iop13xx: use fixed PCI i/o mapping

Move iop13xx PCI to fixed i/o mapping and remove io.h.

This changes the PCIe bus address to start at 0x10000. Let's hope this
works. If it does not, the alternative would be to revert the value we
write into OIOTVR to zero and set sys->io_offset to 64K.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 3 insertions, 19 deletions

diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index d3777dbc2e8b..e10e101645dd 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -69,19 +69,11 @@ extern unsigned long get_iop_tick_rate(void);
  * 0x8000.0000 + 928M   0x2.8000.0000   (ioremap)       PCIE outbound memory window
  *
  * IO MAP
- * 0x1000 + 64K 0x0.fffb.1000   0xfed6.1000     PCIX outbound i/o window
- * 0x1000 + 64K 0x0.fffd.1000   0xfed7.1000     PCIE outbound i/o window
+ * 0x00000 + 64K        0x0.fffb.0000   0xfee0.0000     PCIX outbound i/o window
+ * 0x10000 + 64K        0x0.fffd.0000   0xfee1.0000     PCIE outbound i/o window
  */
-#define IOP13XX_PCIX_IO_WINDOW_SIZE   0x10000UL
 #define IOP13XX_PCIX_LOWER_IO_PA      0xfffb0000UL
-#define IOP13XX_PCIX_LOWER_IO_VA      0xfed60000UL
 #define IOP13XX_PCIX_LOWER_IO_BA      0x0UL /* OIOTVR */
-#define IOP13XX_PCIX_IO_BUS_OFFSET    0x1000UL
-#define IOP13XX_PCIX_UPPER_IO_BA      (IOP13XX_PCIX_LOWER_IO_BA +\
-                                       IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
-                                           (IOP13XX_PCIX_LOWER_IO_PA\
-                                           - IOP13XX_PCIX_LOWER_IO_VA))
 
 #define IOP13XX_PCIX_MEM_PHYS_OFFSET  0x100000000ULL
 #define IOP13XX_PCIX_MEM_WINDOW_SIZE  0x3a000000UL
@@ -101,16 +93,8 @@ extern unsigned long get_iop_tick_rate(void);
                                         IOP13XX_PCIX_LOWER_MEM_BA)
 
 /* PCI-E ranges */
-#define IOP13XX_PCIE_IO_WINDOW_SIZE      0x10000UL
 #define IOP13XX_PCIE_LOWER_IO_PA         0xfffd0000UL
-#define IOP13XX_PCIE_LOWER_IO_VA         0xfed70000UL
-#define IOP13XX_PCIE_LOWER_IO_BA         0x0UL  /* OIOTVR */
-#define IOP13XX_PCIE_IO_BUS_OFFSET       0x1000UL
-#define IOP13XX_PCIE_UPPER_IO_BA         (IOP13XX_PCIE_LOWER_IO_BA +\
-                                         IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
-                                           (IOP13XX_PCIE_LOWER_IO_PA\
-                                           - IOP13XX_PCIE_LOWER_IO_VA))
+#define IOP13XX_PCIE_LOWER_IO_BA         0x10000UL  /* OIOTVR */
 
 #define IOP13XX_PCIE_MEM_PHYS_OFFSET     0x200000000ULL
 #define IOP13XX_PCIE_MEM_WINDOW_SIZE     0x3a000000UL