diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-03-16 16:51:02 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-06-03 02:04:39 -0400 |
commit | a5ecbab7d9b606bdfbec67ccda0fde0f82e1e70e (patch) | |
tree | 7decba401fec83ec57759db7d069b41ff26cd981 /arch/arm/mach-integrator | |
parent | 207bcf45193bd6b847373246b37a3b673b1c81ca (diff) |
ARM: integrator: remap PCIv3 base dynamically
Remove the static mapping for the PCIv3 PCI bridge controller
and do this dynamically when probing instead.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-integrator')
-rw-r--r-- | arch/arm/mach-integrator/include/mach/platform.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-integrator/integrator_ap.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-integrator/pci_v3.c | 20 |
3 files changed, 14 insertions, 13 deletions
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h index be5859efe10e..62fa119bc393 100644 --- a/arch/arm/mach-integrator/include/mach/platform.h +++ b/arch/arm/mach-integrator/include/mach/platform.h | |||
@@ -325,7 +325,6 @@ | |||
325 | 325 | ||
326 | #define PCI_MEMORY_VADDR IOMEM(0xe8000000) | 326 | #define PCI_MEMORY_VADDR IOMEM(0xe8000000) |
327 | #define PCI_CONFIG_VADDR IOMEM(0xec000000) | 327 | #define PCI_CONFIG_VADDR IOMEM(0xec000000) |
328 | #define PCI_V3_VADDR IOMEM(0xed000000) | ||
329 | 328 | ||
330 | /* ------------------------------------------------------------------------ | 329 | /* ------------------------------------------------------------------------ |
331 | * Integrator Interrupt Controllers | 330 | * Integrator Interrupt Controllers |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 0fff21cb4a81..8db3799e8ec6 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -80,7 +80,6 @@ void __iomem *ap_syscon_base; | |||
80 | * Logical Physical | 80 | * Logical Physical |
81 | * e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M) | 81 | * e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M) |
82 | * ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M) | 82 | * ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M) |
83 | * ed000000 62000000 PCI V3 regs PHYS_PCI_V3_BASE (max 64k) | ||
84 | * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M) | 83 | * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M) |
85 | * ef000000 Cache flush | 84 | * ef000000 Cache flush |
86 | * f1000000 10000000 Core module registers | 85 | * f1000000 10000000 Core module registers |
@@ -140,11 +139,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = { | |||
140 | .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE), | 139 | .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE), |
141 | .length = SZ_16M, | 140 | .length = SZ_16M, |
142 | .type = MT_DEVICE | 141 | .type = MT_DEVICE |
143 | }, { | ||
144 | .virtual = (unsigned long)PCI_V3_VADDR, | ||
145 | .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE), | ||
146 | .length = SZ_64K, | ||
147 | .type = MT_DEVICE | ||
148 | } | 142 | } |
149 | }; | 143 | }; |
150 | 144 | ||
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 604064b9d4ff..9dd7125e658f 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -260,15 +260,17 @@ | |||
260 | * the mappings into PCI memory. | 260 | * the mappings into PCI memory. |
261 | */ | 261 | */ |
262 | 262 | ||
263 | static void __iomem *pci_v3_base; | ||
264 | |||
263 | // V3 access routines | 265 | // V3 access routines |
264 | #define v3_writeb(o,v) __raw_writeb(v, PCI_V3_VADDR + (unsigned int)(o)) | 266 | #define v3_writeb(o,v) __raw_writeb(v, pci_v3_base + (unsigned int)(o)) |
265 | #define v3_readb(o) (__raw_readb(PCI_V3_VADDR + (unsigned int)(o))) | 267 | #define v3_readb(o) (__raw_readb(pci_v3_base + (unsigned int)(o))) |
266 | 268 | ||
267 | #define v3_writew(o,v) __raw_writew(v, PCI_V3_VADDR + (unsigned int)(o)) | 269 | #define v3_writew(o,v) __raw_writew(v, pci_v3_base + (unsigned int)(o)) |
268 | #define v3_readw(o) (__raw_readw(PCI_V3_VADDR + (unsigned int)(o))) | 270 | #define v3_readw(o) (__raw_readw(pci_v3_base + (unsigned int)(o))) |
269 | 271 | ||
270 | #define v3_writel(o,v) __raw_writel(v, PCI_V3_VADDR + (unsigned int)(o)) | 272 | #define v3_writel(o,v) __raw_writel(v, pci_v3_base + (unsigned int)(o)) |
271 | #define v3_readl(o) (__raw_readl(PCI_V3_VADDR + (unsigned int)(o))) | 273 | #define v3_readl(o) (__raw_readl(pci_v3_base + (unsigned int)(o))) |
272 | 274 | ||
273 | /*============================================================================ | 275 | /*============================================================================ |
274 | * | 276 | * |
@@ -835,6 +837,12 @@ static int __init pci_v3_probe(struct platform_device *pdev) | |||
835 | return -ENODEV; | 837 | return -ENODEV; |
836 | } | 838 | } |
837 | 839 | ||
840 | pci_v3_base = devm_ioremap(&pdev->dev, PHYS_PCI_V3_BASE, SZ_64K); | ||
841 | if (!pci_v3_base) { | ||
842 | dev_err(&pdev->dev, "unable to remap PCIv3 base\n"); | ||
843 | return -ENODEV; | ||
844 | } | ||
845 | |||
838 | ret = devm_request_irq(&pdev->dev, IRQ_AP_V3INT, v3_irq, 0, "V3", NULL); | 846 | ret = devm_request_irq(&pdev->dev, IRQ_AP_V3INT, v3_irq, 0, "V3", NULL); |
839 | if (ret) { | 847 | if (ret) { |
840 | dev_err(&pdev->dev, "unable to grab PCI error interrupt: %d\n", | 848 | dev_err(&pdev->dev, "unable to grab PCI error interrupt: %d\n", |