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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-01-17 14:59:58 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-02 04:35:28 -0400
commitda7ba956c84d3c85c5ec619af794a6ca0ee3faae (patch)
tree3e0cccd1ca0d29f90870cad6cdc973c9b7218a36 /arch/arm/mach-integrator/integrator_cp.c
parent861248d177145fc5861507e4607fec89fd0a0462 (diff)
ARM: Integrator: fix Integrator/CP definitions, move to platform.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-integrator/integrator_cp.c')
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c38
1 files changed, 18 insertions, 20 deletions
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 108bc480237a..333c297a97cc 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -42,9 +42,6 @@
42 42
43#include "common.h" 43#include "common.h"
44 44
45#define INTCP_PA_MMC_BASE 0x1c000000
46#define INTCP_PA_AACI_BASE 0x1d000000
47
48#define INTCP_PA_FLASH_BASE 0x24000000 45#define INTCP_PA_FLASH_BASE 0x24000000
49#define INTCP_FLASH_SIZE SZ_32M 46#define INTCP_FLASH_SIZE SZ_32M
50 47
@@ -52,12 +49,11 @@
52 49
53#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + 0x40 50#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + 0x40
54#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 51#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
55#define INTCP_VA_SIC_BASE IO_ADDRESS(0xca000000) 52#define INTCP_VA_SIC_BASE IO_ADDRESS(INTEGRATOR_CP_SIC_BASE)
56 53
57#define INTCP_PA_ETH_BASE 0xc8000000
58#define INTCP_ETH_SIZE 0x10 54#define INTCP_ETH_SIZE 0x10
59 55
60#define INTCP_VA_CTRL_BASE IO_ADDRESS(0xcb000000) 56#define INTCP_VA_CTRL_BASE IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
61#define INTCP_FLASHPROG 0x04 57#define INTCP_FLASHPROG 0x04
62#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) 58#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
63#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) 59#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
@@ -72,7 +68,9 @@
72 * f1600000 16000000 UART 0 68 * f1600000 16000000 UART 0
73 * f1700000 17000000 UART 1 69 * f1700000 17000000 UART 1
74 * f1a00000 1a000000 Debug LEDs 70 * f1a00000 1a000000 Debug LEDs
75 * f1b00000 1b000000 GPIO 71 * fc900000 c9000000 GPIO
72 * fca00000 ca000000 SIC
73 * fcb00000 cb000000 CP system control
76 */ 74 */
77 75
78static struct map_desc intcp_io_desc[] __initdata = { 76static struct map_desc intcp_io_desc[] __initdata = {
@@ -117,18 +115,18 @@ static struct map_desc intcp_io_desc[] __initdata = {
117 .length = SZ_4K, 115 .length = SZ_4K,
118 .type = MT_DEVICE 116 .type = MT_DEVICE
119 }, { 117 }, {
120 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE), 118 .virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
121 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE), 119 .pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
122 .length = SZ_4K, 120 .length = SZ_4K,
123 .type = MT_DEVICE 121 .type = MT_DEVICE
124 }, { 122 }, {
125 .virtual = IO_ADDRESS(0xca000000), 123 .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
126 .pfn = __phys_to_pfn(0xca000000), 124 .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
127 .length = SZ_4K, 125 .length = SZ_4K,
128 .type = MT_DEVICE 126 .type = MT_DEVICE
129 }, { 127 }, {
130 .virtual = IO_ADDRESS(0xcb000000), 128 .virtual = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
131 .pfn = __phys_to_pfn(0xcb000000), 129 .pfn = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
132 .length = SZ_4K, 130 .length = SZ_4K,
133 .type = MT_DEVICE 131 .type = MT_DEVICE
134 } 132 }
@@ -364,8 +362,8 @@ static struct platform_device intcp_flash_device = {
364 362
365static struct resource smc91x_resources[] = { 363static struct resource smc91x_resources[] = {
366 [0] = { 364 [0] = {
367 .start = INTCP_PA_ETH_BASE, 365 .start = INTEGRATOR_CP_ETH_BASE,
368 .end = INTCP_PA_ETH_BASE + INTCP_ETH_SIZE - 1, 366 .end = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
369 .flags = IORESOURCE_MEM, 367 .flags = IORESOURCE_MEM,
370 }, 368 },
371 [1] = { 369 [1] = {
@@ -396,7 +394,7 @@ static struct platform_device *intcp_devs[] __initdata = {
396static unsigned int mmc_status(struct device *dev) 394static unsigned int mmc_status(struct device *dev)
397{ 395{
398 unsigned int status = readl(IO_ADDRESS(0xca000000) + 4); 396 unsigned int status = readl(IO_ADDRESS(0xca000000) + 4);
399 writel(8, IO_ADDRESS(0xcb000000) + 8); 397 writel(8, IO_ADDRESS(INTEGRATOR_CP_CTL_BASE) + 8);
400 398
401 return status & 8; 399 return status & 8;
402} 400}
@@ -414,8 +412,8 @@ static struct amba_device mmc_device = {
414 .platform_data = &mmc_data, 412 .platform_data = &mmc_data,
415 }, 413 },
416 .res = { 414 .res = {
417 .start = INTCP_PA_MMC_BASE, 415 .start = INTEGRATOR_CP_MMC_BASE,
418 .end = INTCP_PA_MMC_BASE + SZ_4K - 1, 416 .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
419 .flags = IORESOURCE_MEM, 417 .flags = IORESOURCE_MEM,
420 }, 418 },
421 .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, 419 .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
@@ -427,8 +425,8 @@ static struct amba_device aaci_device = {
427 .init_name = "mb:1d", 425 .init_name = "mb:1d",
428 }, 426 },
429 .res = { 427 .res = {
430 .start = INTCP_PA_AACI_BASE, 428 .start = INTEGRATOR_CP_AACI_BASE,
431 .end = INTCP_PA_AACI_BASE + SZ_4K - 1, 429 .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
432 .flags = IORESOURCE_MEM, 430 .flags = IORESOURCE_MEM,
433 }, 431 },
434 .irq = { IRQ_CP_AACIINT, NO_IRQ }, 432 .irq = { IRQ_CP_AACIINT, NO_IRQ },