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authorAnson Huang <b20788@freescale.com>2014-06-20 01:20:54 -0400
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 04:10:14 -0400
commitff843d621bfc9a9b36c370bb523d3551f2e195dd (patch)
tree6c8cc381228441f662d1a3e8974a6c890d956ba6 /arch/arm/mach-imx
parentfc314334e734edc6727fe9e7d1fd58c31384af4f (diff)
ARM: imx: add suspend support for i.mx6sx
Add suspend support for i.MX6SX. To enter suspend, echo mem > /sys/power/state. To exit suspend, using RTC alarm or enable debug UART wakeup. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/common.h1
-rw-r--r--arch/arm/mach-imx/mach-imx6sx.c1
-rw-r--r--arch/arm/mach-imx/pm-imx6.c29
3 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 7668ff53773f..50ee9c23974c 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -133,6 +133,7 @@ static inline void imx6_suspend(void __iomem *ocram_vbase) {}
133void imx6q_pm_init(void); 133void imx6q_pm_init(void);
134void imx6dl_pm_init(void); 134void imx6dl_pm_init(void);
135void imx6sl_pm_init(void); 135void imx6sl_pm_init(void);
136void imx6sx_pm_init(void);
136void imx6q_pm_set_ccm_base(void __iomem *base); 137void imx6q_pm_set_ccm_base(void __iomem *base);
137 138
138#ifdef CONFIG_PM 139#ifdef CONFIG_PM
diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index 02fccf6033ac..b7a0bdeed31c 100644
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -26,6 +26,7 @@ static void __init imx6sx_init_machine(void)
26 of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); 26 of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
27 27
28 imx_anatop_init(); 28 imx_anatop_init();
29 imx6sx_pm_init();
29} 30}
30 31
31static void __init imx6sx_init_irq(void) 32static void __init imx6sx_init_irq(void)
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 9392a8f4ef24..331055b59218 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -129,6 +129,14 @@ static const u32 imx6sl_mmdc_io_offset[] __initconst = {
129 0x330, 0x334, 0x320, /* SDCKE0, SDCKE1, RESET */ 129 0x330, 0x334, 0x320, /* SDCKE0, SDCKE1, RESET */
130}; 130};
131 131
132static const u32 imx6sx_mmdc_io_offset[] __initconst = {
133 0x2ec, 0x2f0, 0x2f4, 0x2f8, /* DQM0 ~ DQM3 */
134 0x60c, 0x610, 0x61c, 0x620, /* GPR_B0DS ~ GPR_B3DS */
135 0x300, 0x2fc, 0x32c, 0x5f4, /* CAS, RAS, SDCLK_0, GPR_ADDS */
136 0x310, 0x314, 0x5f8, 0x608, /* SODT0, SODT1, MODE_CTL, MODE */
137 0x330, 0x334, 0x338, 0x33c, /* SDQS0 ~ SDQS3 */
138};
139
132static const struct imx6_pm_socdata imx6q_pm_data __initconst = { 140static const struct imx6_pm_socdata imx6q_pm_data __initconst = {
133 .cpu_type = MXC_CPU_IMX6Q, 141 .cpu_type = MXC_CPU_IMX6Q,
134 .mmdc_compat = "fsl,imx6q-mmdc", 142 .mmdc_compat = "fsl,imx6q-mmdc",
@@ -159,6 +167,16 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {
159 .mmdc_io_offset = imx6sl_mmdc_io_offset, 167 .mmdc_io_offset = imx6sl_mmdc_io_offset,
160}; 168};
161 169
170static const struct imx6_pm_socdata imx6sx_pm_data __initconst = {
171 .cpu_type = MXC_CPU_IMX6SX,
172 .mmdc_compat = "fsl,imx6sx-mmdc",
173 .src_compat = "fsl,imx6sx-src",
174 .iomuxc_compat = "fsl,imx6sx-iomuxc",
175 .gpc_compat = "fsl,imx6sx-gpc",
176 .mmdc_io_num = ARRAY_SIZE(imx6sx_mmdc_io_offset),
177 .mmdc_io_offset = imx6sx_mmdc_io_offset,
178};
179
162/* 180/*
163 * This structure is for passing necessary data for low level ocram 181 * This structure is for passing necessary data for low level ocram
164 * suspend code(arch/arm/mach-imx/suspend-imx6.S), if this struct 182 * suspend code(arch/arm/mach-imx/suspend-imx6.S), if this struct
@@ -265,12 +283,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
265 val |= 0x3 << BP_CLPCR_STBY_COUNT; 283 val |= 0x3 << BP_CLPCR_STBY_COUNT;
266 val |= BM_CLPCR_VSTBY; 284 val |= BM_CLPCR_VSTBY;
267 val |= BM_CLPCR_SBYOS; 285 val |= BM_CLPCR_SBYOS;
268 if (cpu_is_imx6sl()) { 286 if (cpu_is_imx6sl())
269 val |= BM_CLPCR_BYPASS_PMIC_READY; 287 val |= BM_CLPCR_BYPASS_PMIC_READY;
288 if (cpu_is_imx6sl() || cpu_is_imx6sx())
270 val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS; 289 val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
271 } else { 290 else
272 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; 291 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
273 }
274 break; 292 break;
275 default: 293 default:
276 return -EINVAL; 294 return -EINVAL;
@@ -549,3 +567,8 @@ void __init imx6sl_pm_init(void)
549{ 567{
550 imx6_pm_common_init(&imx6sl_pm_data); 568 imx6_pm_common_init(&imx6sl_pm_data);
551} 569}
570
571void __init imx6sx_pm_init(void)
572{
573 imx6_pm_common_init(&imx6sx_pm_data);
574}