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authorOlof Johansson <olof@lixom.net>2012-03-08 12:20:29 -0500
committerOlof Johansson <olof@lixom.net>2012-03-08 12:20:29 -0500
commitacf346084bca289a00020a5c29c23673b801b380 (patch)
tree1ab7f6eeefd0564d8fb708b858dc19c8b7e0a67c /arch/arm/mach-imx
parentc71656c018c8551eca45b2f873b239f0303d74cb (diff)
parent38bb3630bcba25f16106166a4aaf211c1d195863 (diff)
Merge tag 'imx35-imx5-aips-setup' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
i.MX35/5 AIPS setup Includes sync up to 3.3-rc6 * tag 'imx35-imx5-aips-setup' of git://git.pengutronix.de/git/imx/linux-2.6: ARM: mx35: Setup the AIPS registers ARM: mx5: Use common function for configuring AIPS
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/cpu-imx5.c36
-rw-r--r--arch/arm/mach-imx/mm-imx3.c4
-rw-r--r--arch/arm/mach-imx/mm-imx5.c8
3 files changed, 12 insertions, 36 deletions
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index 5e2e7a843860..aa15c517d06e 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -149,39 +149,3 @@ int mx50_revision(void)
149 return mx5_cpu_rev; 149 return mx5_cpu_rev;
150} 150}
151EXPORT_SYMBOL(mx50_revision); 151EXPORT_SYMBOL(mx50_revision);
152
153static int __init post_cpu_init(void)
154{
155 unsigned int reg;
156 void __iomem *base;
157
158 if (cpu_is_mx51() || cpu_is_mx53()) {
159 if (cpu_is_mx51())
160 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
161 else
162 base = MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR);
163
164 __raw_writel(0x0, base + 0x40);
165 __raw_writel(0x0, base + 0x44);
166 __raw_writel(0x0, base + 0x48);
167 __raw_writel(0x0, base + 0x4C);
168 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
169 __raw_writel(reg, base + 0x50);
170
171 if (cpu_is_mx51())
172 base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
173 else
174 base = MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR);
175
176 __raw_writel(0x0, base + 0x40);
177 __raw_writel(0x0, base + 0x44);
178 __raw_writel(0x0, base + 0x48);
179 __raw_writel(0x0, base + 0x4C);
180 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
181 __raw_writel(reg, base + 0x50);
182 }
183
184 return 0;
185}
186
187postcore_initcall(post_cpu_init);
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index b23bd3f09a60..2215814c8c2c 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -262,5 +262,9 @@ void __init imx35_soc_init(void)
262 } 262 }
263 263
264 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); 264 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
265
266 /* Setup AIPS registers */
267 imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS1_BASE_ADDR));
268 imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS2_BASE_ADDR));
265} 269}
266#endif /* ifdef CONFIG_SOC_IMX35 */ 270#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 49549a72dc7d..92efecec1260 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -185,6 +185,10 @@ void __init imx51_soc_init(void)
185 185
186 /* i.mx51 has the i.mx35 type sdma */ 186 /* i.mx51 has the i.mx35 type sdma */
187 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); 187 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
188
189 /* Setup AIPS registers */
190 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR));
191 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR));
188} 192}
189 193
190void __init imx53_soc_init(void) 194void __init imx53_soc_init(void)
@@ -200,4 +204,8 @@ void __init imx53_soc_init(void)
200 204
201 /* i.mx53 has the i.mx35 type sdma */ 205 /* i.mx53 has the i.mx35 type sdma */
202 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); 206 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
207
208 /* Setup AIPS registers */
209 imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR));
210 imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR));
203} 211}