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authorEric Bénard <eric@eukrea.com>2012-05-08 03:20:20 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2012-05-08 11:31:24 -0400
commita88da8905ff43f84d4f0e20233467bc8e42433cb (patch)
treef53232a018851b4ed4cfbfd930fba77546e78719 /arch/arm/mach-imx
parent0e189858ffcf0f79423d95f4f36d7156734bba82 (diff)
ARM: imx: eukrea-cpuimx51: remove board
this board is not publicly available and is replaced by cpuimx51sd Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/Kconfig30
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx51-baseboard.c206
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51.c301
4 files changed, 0 insertions, 539 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 28d89d35fc6a..2f824d81030b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -685,36 +685,6 @@ config MACH_MX51_3DS
685 Include support for MX51PDK (3DS) platform. This includes specific 685 Include support for MX51PDK (3DS) platform. This includes specific
686 configurations for the board and its peripherals. 686 configurations for the board and its peripherals.
687 687
688config MACH_EUKREA_CPUIMX51
689 bool "Support Eukrea CPUIMX51 module"
690 select SOC_IMX51
691 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
692 select IMX_HAVE_PLATFORM_IMX_I2C
693 select IMX_HAVE_PLATFORM_IMX_UART
694 select IMX_HAVE_PLATFORM_MXC_EHCI
695 select IMX_HAVE_PLATFORM_MXC_NAND
696 select IMX_HAVE_PLATFORM_SPI_IMX
697 help
698 Include support for Eukrea CPUIMX51 platform. This includes
699 specific configurations for the module and its peripherals.
700
701choice
702 prompt "Baseboard"
703 depends on MACH_EUKREA_CPUIMX51
704 default MACH_EUKREA_MBIMX51_BASEBOARD
705
706config MACH_EUKREA_MBIMX51_BASEBOARD
707 prompt "Eukrea MBIMX51 development board"
708 bool
709 select IMX_HAVE_PLATFORM_IMX_KEYPAD
710 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
711 select LEDS_GPIO_REGISTER
712 help
713 This adds board specific devices that can be found on Eukrea's
714 MBIMX51 evaluation board.
715
716endchoice
717
718config MACH_EUKREA_CPUIMX51SD 688config MACH_EUKREA_CPUIMX51SD
719 bool "Support Eukrea CPUIMX51SD module" 689 bool "Support Eukrea CPUIMX51SD module"
720 select SOC_IMX51 690 select SOC_IMX51
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ab939c5046c3..55303d96d322 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -83,8 +83,6 @@ obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o
83obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o 83obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o
84obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o 84obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o
85obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o 85obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o
86obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o
87obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
88obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o 86obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
89obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o 87obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
90obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o 88obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
diff --git a/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
deleted file mode 100644
index a6a3ab8f1b1c..000000000000
--- a/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 *
3 * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/serial_8250.h>
16#include <linux/i2c.h>
17#include <linux/gpio.h>
18#include <linux/io.h>
19#include <linux/interrupt.h>
20#include <linux/irq.h>
21#include <linux/i2c/tsc2007.h>
22#include <linux/leds.h>
23
24#include <mach/common.h>
25#include <mach/hardware.h>
26#include <mach/iomux-mx51.h>
27
28#include <asm/mach/arch.h>
29
30#include "devices-imx51.h"
31
32#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
33#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
34#define MBIMX51_LED1 IMX_GPIO_NR(3, 6)
35#define MBIMX51_LED2 IMX_GPIO_NR(3, 7)
36#define MBIMX51_LED3 IMX_GPIO_NR(3, 8)
37
38static const struct gpio_led mbimx51_leds[] __initconst = {
39 {
40 .name = "led0",
41 .default_trigger = "heartbeat",
42 .active_low = 1,
43 .gpio = MBIMX51_LED0,
44 },
45 {
46 .name = "led1",
47 .default_trigger = "nand-disk",
48 .active_low = 1,
49 .gpio = MBIMX51_LED1,
50 },
51 {
52 .name = "led2",
53 .default_trigger = "mmc0",
54 .active_low = 1,
55 .gpio = MBIMX51_LED2,
56 },
57 {
58 .name = "led3",
59 .default_trigger = "default-on",
60 .active_low = 1,
61 .gpio = MBIMX51_LED3,
62 },
63};
64
65static const struct gpio_led_platform_data mbimx51_leds_info __initconst = {
66 .leds = mbimx51_leds,
67 .num_leds = ARRAY_SIZE(mbimx51_leds),
68};
69
70static iomux_v3_cfg_t mbimx51_pads[] = {
71 /* UART2 */
72 MX51_PAD_UART2_RXD__UART2_RXD,
73 MX51_PAD_UART2_TXD__UART2_TXD,
74
75 /* UART3 */
76 MX51_PAD_UART3_RXD__UART3_RXD,
77 MX51_PAD_UART3_TXD__UART3_TXD,
78 MX51_PAD_KEY_COL4__UART3_RTS,
79 MX51_PAD_KEY_COL5__UART3_CTS,
80
81 /* TSC2007 IRQ */
82 MX51_PAD_NANDF_D10__GPIO3_30,
83
84 /* LEDS */
85 MX51_PAD_DISPB2_SER_DIN__GPIO3_5,
86 MX51_PAD_DISPB2_SER_DIO__GPIO3_6,
87 MX51_PAD_DISPB2_SER_CLK__GPIO3_7,
88 MX51_PAD_DISPB2_SER_RS__GPIO3_8,
89
90 /* KPP */
91 MX51_PAD_KEY_ROW0__KEY_ROW0,
92 MX51_PAD_KEY_ROW1__KEY_ROW1,
93 MX51_PAD_KEY_ROW2__KEY_ROW2,
94 MX51_PAD_KEY_ROW3__KEY_ROW3,
95 MX51_PAD_KEY_COL0__KEY_COL0,
96 MX51_PAD_KEY_COL1__KEY_COL1,
97 MX51_PAD_KEY_COL2__KEY_COL2,
98 MX51_PAD_KEY_COL3__KEY_COL3,
99
100 /* SD 1 */
101 MX51_PAD_SD1_CMD__SD1_CMD,
102 MX51_PAD_SD1_CLK__SD1_CLK,
103 MX51_PAD_SD1_DATA0__SD1_DATA0,
104 MX51_PAD_SD1_DATA1__SD1_DATA1,
105 MX51_PAD_SD1_DATA2__SD1_DATA2,
106 MX51_PAD_SD1_DATA3__SD1_DATA3,
107
108 /* SD 2 */
109 MX51_PAD_SD2_CMD__SD2_CMD,
110 MX51_PAD_SD2_CLK__SD2_CLK,
111 MX51_PAD_SD2_DATA0__SD2_DATA0,
112 MX51_PAD_SD2_DATA1__SD2_DATA1,
113 MX51_PAD_SD2_DATA2__SD2_DATA2,
114 MX51_PAD_SD2_DATA3__SD2_DATA3,
115};
116
117static const struct imxuart_platform_data uart_pdata __initconst = {
118 .flags = IMXUART_HAVE_RTSCTS,
119};
120
121static int mbimx51_keymap[] = {
122 KEY(0, 0, KEY_1),
123 KEY(0, 1, KEY_2),
124 KEY(0, 2, KEY_3),
125 KEY(0, 3, KEY_UP),
126
127 KEY(1, 0, KEY_4),
128 KEY(1, 1, KEY_5),
129 KEY(1, 2, KEY_6),
130 KEY(1, 3, KEY_LEFT),
131
132 KEY(2, 0, KEY_7),
133 KEY(2, 1, KEY_8),
134 KEY(2, 2, KEY_9),
135 KEY(2, 3, KEY_RIGHT),
136
137 KEY(3, 0, KEY_0),
138 KEY(3, 1, KEY_DOWN),
139 KEY(3, 2, KEY_ESC),
140 KEY(3, 3, KEY_ENTER),
141};
142
143static const struct matrix_keymap_data mbimx51_map_data __initconst = {
144 .keymap = mbimx51_keymap,
145 .keymap_size = ARRAY_SIZE(mbimx51_keymap),
146};
147
148static int tsc2007_get_pendown_state(void)
149{
150 return !gpio_get_value(MBIMX51_TSC2007_GPIO);
151}
152
153struct tsc2007_platform_data tsc2007_data = {
154 .model = 2007,
155 .x_plate_ohms = 180,
156 .get_pendown_state = tsc2007_get_pendown_state,
157};
158
159static struct i2c_board_info mbimx51_i2c_devices[] = {
160 {
161 I2C_BOARD_INFO("tsc2007", 0x49),
162 .irq = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),
163 .platform_data = &tsc2007_data,
164 }, {
165 I2C_BOARD_INFO("tlv320aic23", 0x1a),
166 },
167};
168
169/*
170 * baseboard initialization.
171 */
172void __init eukrea_mbimx51_baseboard_init(void)
173{
174 mxc_iomux_v3_setup_multiple_pads(mbimx51_pads,
175 ARRAY_SIZE(mbimx51_pads));
176
177 imx51_add_imx_uart(1, NULL);
178 imx51_add_imx_uart(2, &uart_pdata);
179
180 gpio_request(MBIMX51_LED0, "LED0");
181 gpio_direction_output(MBIMX51_LED0, 1);
182 gpio_free(MBIMX51_LED0);
183 gpio_request(MBIMX51_LED1, "LED1");
184 gpio_direction_output(MBIMX51_LED1, 1);
185 gpio_free(MBIMX51_LED1);
186 gpio_request(MBIMX51_LED2, "LED2");
187 gpio_direction_output(MBIMX51_LED2, 1);
188 gpio_free(MBIMX51_LED2);
189 gpio_request(MBIMX51_LED3, "LED3");
190 gpio_direction_output(MBIMX51_LED3, 1);
191 gpio_free(MBIMX51_LED3);
192
193 gpio_led_register_device(-1, &mbimx51_leds_info);
194
195 imx51_add_imx_keypad(&mbimx51_map_data);
196
197 gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
198 gpio_direction_input(MBIMX51_TSC2007_GPIO);
199 irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),
200 IRQF_TRIGGER_FALLING);
201 i2c_register_board_info(1, mbimx51_i2c_devices,
202 ARRAY_SIZE(mbimx51_i2c_devices));
203
204 imx51_add_sdhci_esdhc_imx(0, NULL);
205 imx51_add_sdhci_esdhc_imx(1, NULL);
206}
diff --git a/arch/arm/mach-imx/mach-cpuimx51.c b/arch/arm/mach-imx/mach-cpuimx51.c
deleted file mode 100644
index 944025da8333..000000000000
--- a/arch/arm/mach-imx/mach-cpuimx51.c
+++ /dev/null
@@ -1,301 +0,0 @@
1/*
2 *
3 * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
4 *
5 * based on board-mx51_babbage.c which is
6 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
7 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/serial_8250.h>
20#include <linux/i2c.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/io.h>
24#include <linux/interrupt.h>
25
26#include <mach/eukrea-baseboards.h>
27#include <mach/common.h>
28#include <mach/hardware.h>
29#include <mach/iomux-mx51.h>
30
31#include <asm/setup.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35
36#include "devices-imx51.h"
37
38#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
39#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
40#define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25)
41#define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26)
42#define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27)
43#define CPUIMX51_QUART_XTAL 14745600
44#define CPUIMX51_QUART_REGSHIFT 17
45
46/* USB_CTRL_1 */
47#define MX51_USB_CTRL_1_OFFSET 0x10
48#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
49
50#define MX51_USB_PLLDIV_12_MHZ 0x00
51#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
52#define MX51_USB_PLL_DIV_24_MHZ 0x02
53
54static struct plat_serial8250_port serial_platform_data[] = {
55 {
56 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
57 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
58 .irqflags = IRQF_TRIGGER_HIGH,
59 .uartclk = CPUIMX51_QUART_XTAL,
60 .regshift = CPUIMX51_QUART_REGSHIFT,
61 .iotype = UPIO_MEM,
62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
63 }, {
64 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
65 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
66 .irqflags = IRQF_TRIGGER_HIGH,
67 .uartclk = CPUIMX51_QUART_XTAL,
68 .regshift = CPUIMX51_QUART_REGSHIFT,
69 .iotype = UPIO_MEM,
70 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
71 }, {
72 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
73 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
74 .irqflags = IRQF_TRIGGER_HIGH,
75 .uartclk = CPUIMX51_QUART_XTAL,
76 .regshift = CPUIMX51_QUART_REGSHIFT,
77 .iotype = UPIO_MEM,
78 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
79 }, {
80 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
81 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
82 .irqflags = IRQF_TRIGGER_HIGH,
83 .uartclk = CPUIMX51_QUART_XTAL,
84 .regshift = CPUIMX51_QUART_REGSHIFT,
85 .iotype = UPIO_MEM,
86 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
87 }, {
88 }
89};
90
91static struct platform_device serial_device = {
92 .name = "serial8250",
93 .id = 0,
94 .dev = {
95 .platform_data = serial_platform_data,
96 },
97};
98
99static struct platform_device *devices[] __initdata = {
100 &serial_device,
101};
102
103static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = {
104 /* UART1 */
105 MX51_PAD_UART1_RXD__UART1_RXD,
106 MX51_PAD_UART1_TXD__UART1_TXD,
107 MX51_PAD_UART1_RTS__UART1_RTS,
108 MX51_PAD_UART1_CTS__UART1_CTS,
109
110 /* I2C2 */
111 MX51_PAD_GPIO1_2__I2C2_SCL,
112 MX51_PAD_GPIO1_3__I2C2_SDA,
113 MX51_PAD_NANDF_D10__GPIO3_30,
114
115 /* QUART IRQ */
116 MX51_PAD_NANDF_D15__GPIO3_25,
117 MX51_PAD_NANDF_D14__GPIO3_26,
118 MX51_PAD_NANDF_D13__GPIO3_27,
119 MX51_PAD_NANDF_D12__GPIO3_28,
120
121 /* USB HOST1 */
122 MX51_PAD_USBH1_CLK__USBH1_CLK,
123 MX51_PAD_USBH1_DIR__USBH1_DIR,
124 MX51_PAD_USBH1_NXT__USBH1_NXT,
125 MX51_PAD_USBH1_DATA0__USBH1_DATA0,
126 MX51_PAD_USBH1_DATA1__USBH1_DATA1,
127 MX51_PAD_USBH1_DATA2__USBH1_DATA2,
128 MX51_PAD_USBH1_DATA3__USBH1_DATA3,
129 MX51_PAD_USBH1_DATA4__USBH1_DATA4,
130 MX51_PAD_USBH1_DATA5__USBH1_DATA5,
131 MX51_PAD_USBH1_DATA6__USBH1_DATA6,
132 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
133 MX51_PAD_USBH1_STP__USBH1_STP,
134};
135
136static const struct mxc_nand_platform_data
137 eukrea_cpuimx51_nand_board_info __initconst = {
138 .width = 1,
139 .hw_ecc = 1,
140 .flash_bbt = 1,
141};
142
143static const struct imxuart_platform_data uart_pdata __initconst = {
144 .flags = IMXUART_HAVE_RTSCTS,
145};
146
147static const
148struct imxi2c_platform_data eukrea_cpuimx51_i2c_data __initconst = {
149 .bitrate = 100000,
150};
151
152static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {
153 {
154 I2C_BOARD_INFO("pcf8563", 0x51),
155 },
156};
157
158/* This function is board specific as the bit mask for the plldiv will also
159be different for other Freescale SoCs, thus a common bitmask is not
160possible and cannot get place in /plat-mxc/ehci.c.*/
161static int initialize_otg_port(struct platform_device *pdev)
162{
163 u32 v;
164 void __iomem *usb_base;
165 void __iomem *usbother_base;
166
167 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
168 if (!usb_base)
169 return -ENOMEM;
170 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
171
172 /* Set the PHY clock to 19.2MHz */
173 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
174 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
175 v |= MX51_USB_PLL_DIV_19_2_MHZ;
176 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
177 iounmap(usb_base);
178
179 mdelay(10);
180
181 return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
182}
183
184static int initialize_usbh1_port(struct platform_device *pdev)
185{
186 u32 v;
187 void __iomem *usb_base;
188 void __iomem *usbother_base;
189
190 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
191 if (!usb_base)
192 return -ENOMEM;
193 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
194
195 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
196 v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
197 __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
198 iounmap(usb_base);
199
200 mdelay(10);
201
202 return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
203 MXC_EHCI_ITC_NO_THRESHOLD);
204}
205
206static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
207 .init = initialize_otg_port,
208 .portsc = MXC_EHCI_UTMI_16BIT,
209};
210
211static const struct fsl_usb2_platform_data usb_pdata __initconst = {
212 .operating_mode = FSL_USB2_DR_DEVICE,
213 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
214};
215
216static const struct mxc_usbh_platform_data usbh1_config __initconst = {
217 .init = initialize_usbh1_port,
218 .portsc = MXC_EHCI_MODE_ULPI,
219};
220
221static int otg_mode_host;
222
223static int __init eukrea_cpuimx51_otg_mode(char *options)
224{
225 if (!strcmp(options, "host"))
226 otg_mode_host = 1;
227 else if (!strcmp(options, "device"))
228 otg_mode_host = 0;
229 else
230 pr_info("otg_mode neither \"host\" nor \"device\". "
231 "Defaulting to device\n");
232 return 0;
233}
234__setup("otg_mode=", eukrea_cpuimx51_otg_mode);
235
236/*
237 * Board specific initialization.
238 */
239static void __init eukrea_cpuimx51_init(void)
240{
241 imx51_soc_init();
242
243 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads,
244 ARRAY_SIZE(eukrea_cpuimx51_pads));
245
246 imx51_add_imx_uart(0, &uart_pdata);
247 imx51_add_mxc_nand(&eukrea_cpuimx51_nand_board_info);
248
249 gpio_request(CPUIMX51_QUARTA_GPIO, "quarta_irq");
250 gpio_direction_input(CPUIMX51_QUARTA_GPIO);
251 gpio_free(CPUIMX51_QUARTA_GPIO);
252 gpio_request(CPUIMX51_QUARTB_GPIO, "quartb_irq");
253 gpio_direction_input(CPUIMX51_QUARTB_GPIO);
254 gpio_free(CPUIMX51_QUARTB_GPIO);
255 gpio_request(CPUIMX51_QUARTC_GPIO, "quartc_irq");
256 gpio_direction_input(CPUIMX51_QUARTC_GPIO);
257 gpio_free(CPUIMX51_QUARTC_GPIO);
258 gpio_request(CPUIMX51_QUARTD_GPIO, "quartd_irq");
259 gpio_direction_input(CPUIMX51_QUARTD_GPIO);
260 gpio_free(CPUIMX51_QUARTD_GPIO);
261
262 imx51_add_fec(NULL);
263 platform_add_devices(devices, ARRAY_SIZE(devices));
264
265 imx51_add_imx_i2c(1, &eukrea_cpuimx51_i2c_data);
266 i2c_register_board_info(1, eukrea_cpuimx51_i2c_devices,
267 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
268
269 if (otg_mode_host)
270 imx51_add_mxc_ehci_otg(&dr_utmi_config);
271 else {
272 initialize_otg_port(NULL);
273 imx51_add_fsl_usb2_udc(&usb_pdata);
274 }
275 imx51_add_mxc_ehci_hs(1, &usbh1_config);
276
277#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
278 eukrea_mbimx51_baseboard_init();
279#endif
280}
281
282static void __init eukrea_cpuimx51_timer_init(void)
283{
284 mx51_clocks_init(32768, 24000000, 22579200, 0);
285}
286
287static struct sys_timer mxc_timer = {
288 .init = eukrea_cpuimx51_timer_init,
289};
290
291MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
292 /* Maintainer: Eric Bénard <eric@eukrea.com> */
293 .atag_offset = 0x100,
294 .map_io = mx51_map_io,
295 .init_early = imx51_init_early,
296 .init_irq = mx51_init_irq,
297 .handle_irq = imx51_handle_irq,
298 .timer = &mxc_timer,
299 .init_machine = eukrea_cpuimx51_init,
300 .restart = mxc_restart,
301MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-13 03:37:59 -0400