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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2015-02-15 19:07:18 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2015-02-15 19:07:18 -0500
commit97ae2b5c17d6cc988c6d49ae0cf95befb6b7081c (patch)
treea71115af6c30fdc9de0878e2cf1c51e95b17a324 /arch/arm/mach-imx
parentef47fa5280819deaa8da7e0db1d875b225de5838 (diff)
parentc8af781ebf3ffe37c18c34ca89e29c085560e561 (diff)
Merge branch 'bfin_rotary' into next
Merge bfin_rotary driver changes from Sonic Zhang.
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6sx.c3
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 5951660d1bd2..2daef619d053 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -144,7 +144,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
144 post_div_table[1].div = 1; 144 post_div_table[1].div = 1;
145 post_div_table[2].div = 1; 145 post_div_table[2].div = 1;
146 video_div_table[1].div = 1; 146 video_div_table[1].div = 1;
147 video_div_table[2].div = 1; 147 video_div_table[3].div = 1;
148 } 148 }
149 149
150 clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels)); 150 clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
index 17354a11356f..5a3e5a159e70 100644
--- a/arch/arm/mach-imx/clk-imx6sx.c
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -558,6 +558,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
558 clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]); 558 clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
559 clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]); 559 clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
560 560
561 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
562 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
563
561 /* Set initial power mode */ 564 /* Set initial power mode */
562 imx6q_set_lpm(WAIT_CLOCKED); 565 imx6q_set_lpm(WAIT_CLOCKED);
563} 566}