arm: Replace various irq_desc accesses

Use the proper functions. There is no need to fiddle with irq_desc.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>C
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: arm <linux-arm-kernel@lists.infradead.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20140223212737.099151500@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

1 files changed, 3 insertions, 4 deletions

diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index 7a9b98589db7..29e3fe6a6669 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable)
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
 {
-        struct irq_desc *iomuxc_irq_desc;
+        struct irq_data *iomuxc_irq_data = irq_get_irq_data(32);
         u32 val = readl_relaxed(ccm_base + CLPCR);
 
         val &= ~BM_CLPCR_LPM;
@@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
          * 3) Software should mask IRQ #32 right after CCM Low-Power mode
          *    is set (set bits 0-1 of CCM_CLPCR).
          */
-        iomuxc_irq_desc = irq_to_desc(32);
-        imx_gpc_irq_unmask(&iomuxc_irq_desc->irq_data);
+        imx_gpc_irq_unmask(iomuxc_irq_data);
         writel_relaxed(val, ccm_base + CLPCR);
-        imx_gpc_irq_mask(&iomuxc_irq_desc->irq_data);
+        imx_gpc_irq_mask(iomuxc_irq_data);
 
         return 0;
 }