Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm soc-specific updates from Arnd Bergmann:
 "This is stuff that does not fit well into another category and in
  particular is not related to a particular board.  The largest part in
  here is extending the am33xx support in the omap platform."

Fix up trivial conflicts in arch/arm/mach-{imx/mach-mx35_3ds.c, tegra/Makefile}

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: LPC32xx: Add PWM support
  ARM: LPC32xx: Add PWM clock
  ARM: LPC32xx: Set system serial based on cpu unique id
  ARM: vexpress: Config option for early printk console
  ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
  ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
  ARM: vexpress: Add fixed regulator for SMSC
  ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
  ARM: vexpress: Initial common clock support
  ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API
  ARM: EXYNOS: Add missing static storage class specifier in pmu.c file
  ARM: EXYNOS: Make combiner_init function static
  ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
  ARM: versatile: Make plat-versatile clock optional
  ARM: vexpress: Check master site in daughterboard's sysctl operations
  ARM: vexpress: remove automatic errata workaround selection
  ARM: LPC32xx: Adjust to pl08x DMA interface changes
  ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
  ARM: imx: fix mx51 ehci setup errors
  ARM: imx: make ehci power/oc polarities configurable
  ...

6 files changed, 72 insertions, 15 deletions

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0da882a3c063..1bba37c6598b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -73,7 +73,7 @@ config SOC_IMX31
 
 config SOC_IMX35
         bool
-        select CPU_V6
+        select CPU_V6K
         select ARCH_MXC_IOMUX_V3
         select COMMON_CLK
         select HAVE_EPIT
@@ -588,6 +588,7 @@ config MACH_MX35_3DS
         select IMX_HAVE_PLATFORM_IPU_CORE
         select IMX_HAVE_PLATFORM_MXC_EHCI
         select IMX_HAVE_PLATFORM_MXC_NAND
+        select IMX_HAVE_PLATFORM_MXC_RTC
         select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
         help
           Include support for MX35PDK platform. This includes specific
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index 27245ce9cab2..4815be1ee675 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -68,6 +68,10 @@ extern const struct imx_mxc_nand_data imx35_mxc_nand_data;
 #define imx35_add_mxc_nand(pdata)       \
         imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
 
+extern const struct imx_mxc_rtc_data imx35_mxc_rtc_data;
+#define imx35_add_mxc_rtc()     \
+        imx_add_mxc_rtc(&imx35_mxc_rtc_data)
+
 extern const struct imx_mxc_w1_data imx35_mxc_w1_data;
 #define imx35_add_mxc_w1()      \
         imx_add_mxc_w1(&imx35_mxc_w1_data)
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 865daf0b09e9..05bb41d99728 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -24,14 +24,18 @@
 #define MX25_OTG_SIC_SHIFT      29
 #define MX25_OTG_SIC_MASK       (0x3 << MX25_OTG_SIC_SHIFT)
 #define MX25_OTG_PM_BIT         (1 << 24)
+#define MX25_OTG_PP_BIT         (1 << 11)
+#define MX25_OTG_OCPOL_BIT      (1 << 3)
 
 #define MX25_H1_SIC_SHIFT       21
 #define MX25_H1_SIC_MASK        (0x3 << MX25_H1_SIC_SHIFT)
+#define MX25_H1_PP_BIT          (1 << 18)
 #define MX25_H1_PM_BIT          (1 << 8)
 #define MX25_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX25_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX25_H1_TLL_BIT         (1 << 5)
 #define MX25_H1_USBTE_BIT       (1 << 4)
+#define MX25_H1_OCPOL_BIT       (1 << 2)
 
 int mx25_initialize_usb_hw(int port, unsigned int flags)
 {
@@ -41,21 +45,35 @@ int mx25_initialize_usb_hw(int port, unsigned int flags)
 
         switch (port) {
         case 0: /* OTG port */
-                v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT);
+                v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT |
+                        MX25_OTG_OCPOL_BIT);
                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
 
                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                         v |= MX25_OTG_PM_BIT;
 
+                if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+                        v |= MX25_OTG_PP_BIT;
+
+                if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+                        v |= MX25_OTG_OCPOL_BIT;
+
                 break;
         case 1: /* H1 port */
-                v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_TLL_BIT |
-                        MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT | MX25_H1_IPPUE_UP_BIT);
+                v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT |
+                        MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | MX25_H1_USBTE_BIT |
+                        MX25_H1_IPPUE_DOWN_BIT | MX25_H1_IPPUE_UP_BIT);
                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
 
                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                         v |= MX25_H1_PM_BIT;
 
+                if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+                        v |= MX25_H1_PP_BIT;
+
+                if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+                        v |= MX25_H1_OCPOL_BIT;
+
                 if (!(flags & MXC_EHCI_TTL_ENABLED))
                         v |= MX25_H1_TLL_BIT;
 
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 001ec3971f5d..73574c30cf50 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -24,14 +24,18 @@
 #define MX35_OTG_SIC_SHIFT      29
 #define MX35_OTG_SIC_MASK       (0x3 << MX35_OTG_SIC_SHIFT)
 #define MX35_OTG_PM_BIT         (1 << 24)
+#define MX35_OTG_PP_BIT         (1 << 11)
+#define MX35_OTG_OCPOL_BIT      (1 << 3)
 
 #define MX35_H1_SIC_SHIFT       21
 #define MX35_H1_SIC_MASK        (0x3 << MX35_H1_SIC_SHIFT)
+#define MX35_H1_PP_BIT          (1 << 18)
 #define MX35_H1_PM_BIT          (1 << 8)
 #define MX35_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX35_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX35_H1_TLL_BIT         (1 << 5)
 #define MX35_H1_USBTE_BIT       (1 << 4)
+#define MX35_H1_OCPOL_BIT       (1 << 2)
 
 int mx35_initialize_usb_hw(int port, unsigned int flags)
 {
@@ -41,21 +45,35 @@ int mx35_initialize_usb_hw(int port, unsigned int flags)
 
         switch (port) {
         case 0: /* OTG port */
-                v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
+                v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT |
+                        MX35_OTG_OCPOL_BIT);
                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;
 
                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                         v |= MX35_OTG_PM_BIT;
 
+                if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+                        v |= MX35_OTG_PP_BIT;
+
+                if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+                        v |= MX35_OTG_OCPOL_BIT;
+
                 break;
         case 1: /* H1 port */
-                v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
-                        MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
+                v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT |
+                        MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT |
+                        MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;
 
                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                         v |= MX35_H1_PM_BIT;
 
+                if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+                        v |= MX35_H1_PP_BIT;
+
+                if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
+                        v |= MX35_H1_OCPOL_BIT;
+
                 if (!(flags & MXC_EHCI_TTL_ENABLED))
                         v |= MX35_H1_TLL_BIT;
 
diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c
index c17fa131728b..a6a4afb0ad62 100644
--- a/arch/arm/mach-imx/ehci-imx5.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
@@ -28,11 +28,14 @@
 #define MXC_OTG_UCTRL_OPM_BIT           (1 << 24)       /* OTG power mask */
 #define MXC_H1_UCTRL_H1UIE_BIT          (1 << 12)       /* Host1 ULPI interrupt enable */
 #define MXC_H1_UCTRL_H1WIE_BIT          (1 << 11)       /* HOST1 wakeup intr enable */
-#define MXC_H1_UCTRL_H1PM_BIT           (1 <<  8)               /* HOST1 power mask */
+#define MXC_H1_UCTRL_H1PM_BIT           (1 <<  8)       /* HOST1 power mask */
 
 /* USB_PHY_CTRL_FUNC */
+#define MXC_OTG_PHYCTRL_OC_POL_BIT      (1 << 9)        /* OTG Polarity of Overcurrent */
 #define MXC_OTG_PHYCTRL_OC_DIS_BIT      (1 << 8)        /* OTG Disable Overcurrent Event */
+#define MXC_H1_OC_POL_BIT               (1 << 6)        /* UH1 Polarity of Overcurrent */
 #define MXC_H1_OC_DIS_BIT               (1 << 5)        /* UH1 Disable Overcurrent Event */
+#define MXC_OTG_PHYCTRL_PWR_POL_BIT     (1 << 3)        /* OTG Power Pin Polarity */
 
 /* USBH2CTRL */
 #define MXC_H2_UCTRL_H2UIE_BIT          (1 << 8)
@@ -80,13 +83,21 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
                 if (flags & MXC_EHCI_INTERNAL_PHY) {
                         v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
 
+                        if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)
+                                v |= MXC_OTG_PHYCTRL_OC_POL_BIT;
+                        else
+                                v &= ~MXC_OTG_PHYCTRL_OC_POL_BIT;
                         if (flags & MXC_EHCI_POWER_PINS_ENABLED) {
-                                /* OC/USBPWR is not used */
-                                v |= MXC_OTG_PHYCTRL_OC_DIS_BIT;
-                        } else {
                                 /* OC/USBPWR is used */
                                 v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT;
+                        } else {
+                                /* OC/USBPWR is not used */
+                                v |= MXC_OTG_PHYCTRL_OC_DIS_BIT;
                         }
+                        if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
+                                v |= MXC_OTG_PHYCTRL_PWR_POL_BIT;
+                        else
+                                v &= ~MXC_OTG_PHYCTRL_PWR_POL_BIT;
                         __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
 
                         v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);
@@ -95,9 +106,9 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
                         else
                                 v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */
                         if (flags & MXC_EHCI_POWER_PINS_ENABLED)
-                                v |= MXC_OTG_UCTRL_OPM_BIT;
-                        else
                                 v &= ~MXC_OTG_UCTRL_OPM_BIT;
+                        else
+                                v |= MXC_OTG_UCTRL_OPM_BIT;
                         __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
                 }
                 break;
@@ -113,12 +124,16 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
                 }
 
                 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
-                        v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/
+                        v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask unused*/
                 else
                         v |= MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/
                 __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
 
                 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
+                if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)
+                        v |= MXC_H1_OC_POL_BIT;
+                else
+                        v &= ~MXC_H1_OC_POL_BIT;
                 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
                         v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */
                 else
@@ -142,7 +157,7 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
                 }
 
                 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
-                        v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/
+                        v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask unused*/
                 else
                         v |= MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/
                 __raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 6bff87907317..69018e5c52de 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -572,6 +572,7 @@ static void __init mx35_3ds_init(void)
 
         imx35_add_fec(NULL);
         imx35_add_imx2_wdt();
+        imx35_add_mxc_rtc();
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         imx35_add_imx_uart0(&uart_pdata);