Merge branch 'clps711x/cleanup' into next/cleanup

Patches from Alexander Shiyan <shc_work@mail.ru>:

* clps711x/cleanup:
  ARM: clps711x: Remove the setting of the time
  ARM: clps711x: Removed superfluous transform virt_to_bus and related functions
  ARM: clps711x/p720t: Replace __initcall by .init_early call

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

2 files changed, 9 insertions, 2 deletions

diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 920a8cc42726..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
                         pr_err("i.MX35 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
-
         clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
         clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
         clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init()
         clk_prepare_enable(clk[iim_gate]);
         clk_prepare_enable(clk[emi_gate]);
 
+        /*
+         * SCC is needed to boot via mmc after a watchdog reset. The clock code
+         * before conversion to common clk also enabled UART1 (which isn't
+         * handled here and not needed for mmc) and IIM (which is enabled
+         * unconditionally above).
+         */
+        clk_prepare_enable(clk[scc_gate]);
+
         imx_print_silicon_rev("i.MX35", mx35_revision());
 
 #ifdef CONFIG_MXC_USE_EPIT
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f76edb96a48a..ba09552fe5fe 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,7 +38,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <asm/system.h>
+#include <asm/system_info.h>
 #include <mach/common.h>
 #include <mach/iomux-mx27.h>