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authorArnd Bergmann <arnd@arndb.de>2012-10-25 09:57:40 -0400
committerArnd Bergmann <arnd@arndb.de>2012-10-25 09:57:40 -0400
commit3529e730b562f105764cc3dd287ff0a86cedfa85 (patch)
tree26852ca2a5fbc72b6a6c638953899fc7d4bed6b2 /arch/arm/mach-imx
parentbc20debaa99163ec9af91fefdd356978d687fdf8 (diff)
parent92063cee118655d25b50d04eb77b012f3287357a (diff)
Merge tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes
Patches from Sascha Hauer <s.hauer@pengutronix.de>: ARM i.MX fixes for 3.7-rc * tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX25: Fix PWM per clock lookups ARM i.MX25 clk: Fix nfc_ipg_per parent ARM i.MX25: Fix lcdc_ipg_per parent clock ARM: mxc: platform-mxc-mmc: Fix register region size ARM: imx: clk-imx27: Fix divider width field ARM: imx: fix the return value check in imx_clk_busy_divider() ARM: imx_v6_v7_defconfig: Enable CONFIG_GPIO_MC9S08DZ60 ARM: imx: fix return value check in imx3_init_l2x0() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clk-busy.c2
-rw-r--r--arch/arm/mach-imx/clk-imx25.c12
-rw-r--r--arch/arm/mach-imx/clk-imx27.c4
-rw-r--r--arch/arm/mach-imx/mm-imx3.c5
4 files changed, 11 insertions, 12 deletions
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 1a7a8dd045a1..1ab91b5209e6 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
108 busy->div.hw.init = &init; 108 busy->div.hw.init = &init;
109 109
110 clk = clk_register(NULL, &busy->div.hw); 110 clk = clk_register(NULL, &busy->div.hw);
111 if (!clk) 111 if (IS_ERR(clk))
112 kfree(busy); 112 kfree(busy);
113 113
114 return clk; 114 return clk;
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d20d4795f4ea..840fdfac52bc 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -127,8 +127,8 @@ int __init mx25_clocks_init(void)
127 clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); 127 clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
128 clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); 128 clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
129 clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); 129 clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
130 clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7); 130 clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);
131 clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8); 131 clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);
132 clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); 132 clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
133 clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); 133 clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
134 clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); 134 clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
@@ -203,13 +203,13 @@ int __init mx25_clocks_init(void)
203 clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); 203 clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
204 clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2"); 204 clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2");
205 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0"); 205 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0");
206 clk_register_clkdev(clk[per10], "per", "mxc_pwm.0"); 206 clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.0");
207 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1"); 207 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1");
208 clk_register_clkdev(clk[per10], "per", "mxc_pwm.1"); 208 clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.1");
209 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2"); 209 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2");
210 clk_register_clkdev(clk[per10], "per", "mxc_pwm.2"); 210 clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.2");
211 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3"); 211 clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3");
212 clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); 212 clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.3");
213 clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); 213 clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
214 clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); 214 clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
215 clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); 215 clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 3b6b640eed24..366e5d59d886 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref)
109 clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6); 109 clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);
110 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); 110 clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
111 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks)); 111 clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
112 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3); 112 clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
113 clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3); 113 clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
114 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); 114 clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
115 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); 115 clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
@@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref)
121 clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); 121 clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
122 clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); 122 clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
123 clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6); 123 clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);
124 clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3); 124 clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6);
125 clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0); 125 clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);
126 clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0); 126 clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);
127 clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1); 127 clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9d2c843bde02..b5deb0554552 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void)
108 } 108 }
109 109
110 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); 110 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
111 if (IS_ERR(l2x0_base)) { 111 if (!l2x0_base) {
112 printk(KERN_ERR "remapping L2 cache area failed with %ld\n", 112 printk(KERN_ERR "remapping L2 cache area failed\n");
113 PTR_ERR(l2x0_base));
114 return; 113 return;
115 } 114 }
116 115