diff options
author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
commit | 30716e07ef511ec7525c07eb1e8060ba8943c2a2 (patch) | |
tree | eb6a47cae63d3587fa773cc5a16781eaa2c7810b /arch/arm/mach-imx | |
parent | 03c79cc56e4497cbd09d74a73c1bd0d1d9a8a16c (diff) | |
parent | f56df2f4db6e4af87fb8e941cff69f4501a111df (diff) |
Merge branch 'linus'
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/cpufreq.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index ac5f99895660..4f66e90db74f 100644 --- a/arch/arm/mach-imx/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c | |||
@@ -184,6 +184,17 @@ static int imx_set_target(struct cpufreq_policy *policy, | |||
184 | long sysclk; | 184 | long sysclk; |
185 | unsigned int bclk_div = 1; | 185 | unsigned int bclk_div = 1; |
186 | 186 | ||
187 | /* | ||
188 | * Some governors do not respects CPU and policy lower limits | ||
189 | * which leads to bad things (division by zero etc), ensure | ||
190 | * that such things do not happen. | ||
191 | */ | ||
192 | if(target_freq < policy->cpuinfo.min_freq) | ||
193 | target_freq = policy->cpuinfo.min_freq; | ||
194 | |||
195 | if(target_freq < policy->min) | ||
196 | target_freq = policy->min; | ||
197 | |||
187 | freq = target_freq * 1000; | 198 | freq = target_freq * 1000; |
188 | 199 | ||
189 | pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", | 200 | pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", |
@@ -258,7 +269,8 @@ static int __init imx_cpufreq_driver_init(struct cpufreq_policy *policy) | |||
258 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | 269 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
259 | policy->cpuinfo.min_freq = 8000; | 270 | policy->cpuinfo.min_freq = 8000; |
260 | policy->cpuinfo.max_freq = 200000; | 271 | policy->cpuinfo.max_freq = 200000; |
261 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | 272 | /* Manual states, that PLL stabilizes in two CLK32 periods */ |
273 | policy->cpuinfo.transition_latency = 4 * 1000000000LL / CLK32; | ||
262 | return 0; | 274 | return 0; |
263 | } | 275 | } |
264 | 276 | ||