Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical bug fixes from Arnd Bergmann:
 "These are bug fixes for harmless problems that were not important
  enough to get fixed in 3.19.  This contains updates to the MAINTAINERS
  file, in particular:

   - Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for
     long years of maintaining this).  Kukjin Kim, who has been doing
     the work de-facto by himself recently is now the only maintainer.

   - Liviu, Sudeep and Lorenzo from ARM now officially maintain the
     Versatile Express platform, which was orphaned (thanks for

   - Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX
     platform

   - Ray Jui and Scott Branden are the future maintainers for the newly
     merged Broadcom Cygnus platform.  Welcome!

  In terms of actual fixes, we have the usual set of OMAP bug fixes,
  which Tony Lindgren separates out well from the other OMAP changes,
  one really ep93xx regression fix against 3.11 that didn't make it for
  3.18, a few GIC changes from Marc Zyngier as a preparation for later
  rework (the current code is wrong in a harmless way), on Tegra
  regression and one samsung spelling fix"

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: imx6: fix bogus use of irq_get_irq_data
  ARM: imx: irq: fix buggy usage of irq_data irq field
  MAINTAINERS: ARM Versatile Express platform, add missing pattern
  MAINTAINERS: ARM Versatile Express platform
  arm: ep93xx: add dma_masks for the M2P and M2M DMA controllers
  MAINTAINERS: Add ahci_st.c to ARCH/STI architecture
  MAINTAINERS: add entry for the GISB arbiter driver
  MAINTAINERS: update brcmstb entries
  MAINTAINERS: update email address and cleanup for exynos entry
  ARM: tegra: Re-add removed SoC id macro to tegra_resume()
  MAINTAINERS: Entry for Cygnus/iproc arm architecture
  ARM: OMAP: serial: remove last vestige of DTR_gpio support.
  ARM: OMAP2+: gpmc: Get rid of "ti,elm-id not found" warning
  ARM: EXYNOS: fix typo in static struct name "exynos5_list_diable_wfi_wfe"
  ARM: OMAP2: Remove unnecessary KERN_* in omap_phy_internal.c
  ARM: OMAP4+: Remove unused omap_l3_noc platform init
  ARM: dts: Add twl keypad map for omap3 EVM
  ARM: dts: Add twl keypad map for LDP
  ARM: dts: Fix NAND last partition size on LDP
  ARM: OMAP3: Fix errors for omap_l3_smx when booted with device tree

3 files changed, 30 insertions, 21 deletions

diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 1dabf435c592..66662a1e36de 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -108,8 +108,8 @@ void imx_gpc_pre_suspend(bool arm_power_off);
 void imx_gpc_post_resume(void);
 void imx_gpc_mask_all(void);
 void imx_gpc_restore_all(void);
-void imx_gpc_irq_mask(struct irq_data *d);
-void imx_gpc_irq_unmask(struct irq_data *d);
+void imx_gpc_hwirq_mask(unsigned int hwirq);
+void imx_gpc_hwirq_unmask(unsigned int hwirq);
 void imx_anatop_init(void);
 void imx_anatop_pre_suspend(void);
 void imx_anatop_post_resume(void);
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index 82ea74e68482..5f3602ec74fa 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -56,14 +56,14 @@ void imx_gpc_post_resume(void)
 
 static int imx_gpc_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-        unsigned int idx = d->irq / 32 - 1;
+        unsigned int idx = d->hwirq / 32 - 1;
         u32 mask;
 
         /* Sanity check for SPI irq */
-        if (d->irq < 32)
+        if (d->hwirq < 32)
                 return -EINVAL;
 
-        mask = 1 << d->irq % 32;
+        mask = 1 << d->hwirq % 32;
         gpc_wake_irqs[idx] = on ? gpc_wake_irqs[idx] | mask :
                                   gpc_wake_irqs[idx] & ~mask;
 
@@ -91,34 +91,44 @@ void imx_gpc_restore_all(void)
                 writel_relaxed(gpc_saved_imrs[i], reg_imr1 + i * 4);
 }
 
-void imx_gpc_irq_unmask(struct irq_data *d)
+void imx_gpc_hwirq_unmask(unsigned int hwirq)
 {
         void __iomem *reg;
         u32 val;
 
-        /* Sanity check for SPI irq */
-        if (d->irq < 32)
-                return;
-
-        reg = gpc_base + GPC_IMR1 + (d->irq / 32 - 1) * 4;
+        reg = gpc_base + GPC_IMR1 + (hwirq / 32 - 1) * 4;
         val = readl_relaxed(reg);
-        val &= ~(1 << d->irq % 32);
+        val &= ~(1 << hwirq % 32);
         writel_relaxed(val, reg);
 }
 
-void imx_gpc_irq_mask(struct irq_data *d)
+void imx_gpc_hwirq_mask(unsigned int hwirq)
 {
         void __iomem *reg;
         u32 val;
 
+        reg = gpc_base + GPC_IMR1 + (hwirq / 32 - 1) * 4;
+        val = readl_relaxed(reg);
+        val |= 1 << (hwirq % 32);
+        writel_relaxed(val, reg);
+}
+
+static void imx_gpc_irq_unmask(struct irq_data *d)
+{
+        /* Sanity check for SPI irq */
+        if (d->hwirq < 32)
+                return;
+
+        imx_gpc_hwirq_unmask(d->hwirq);
+}
+
+static void imx_gpc_irq_mask(struct irq_data *d)
+{
         /* Sanity check for SPI irq */
-        if (d->irq < 32)
+        if (d->hwirq < 32)
                 return;
 
-        reg = gpc_base + GPC_IMR1 + (d->irq / 32 - 1) * 4;
-        val = readl_relaxed(reg);
-        val |= 1 << (d->irq % 32);
-        writel_relaxed(val, reg);
+        imx_gpc_hwirq_mask(d->hwirq);
 }
 
 void __init imx_gpc_init(void)
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 5c3af8f993d0..d815d1ba27a5 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -261,7 +261,6 @@ static void imx6q_enable_wb(bool enable)
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
 {
-        struct irq_data *iomuxc_irq_data = irq_get_irq_data(32);
         u32 val = readl_relaxed(ccm_base + CLPCR);
 
         val &= ~BM_CLPCR_LPM;
@@ -316,9 +315,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
          * 3) Software should mask IRQ #32 right after CCM Low-Power mode
          *    is set (set bits 0-1 of CCM_CLPCR).
          */
-        imx_gpc_irq_unmask(iomuxc_irq_data);
+        imx_gpc_hwirq_unmask(32);
         writel_relaxed(val, ccm_base + CLPCR);
-        imx_gpc_irq_mask(iomuxc_irq_data);
+        imx_gpc_hwirq_mask(32);
 
         return 0;
 }