diff options
author | Anson Huang <b20788@freescale.com> | 2014-01-09 03:03:16 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2014-03-04 21:35:01 -0500 |
commit | 751f7e999afcef157527f5f6f06529c93f8a4022 (patch) | |
tree | 49dae752f037aa96d2a61ec88ee5179a75c0d86d /arch/arm/mach-imx/cpuidle.h | |
parent | 848db4a0a17aaf97b8ba5b1f754d635ff622670a (diff) |
ARM: imx: add cpuidle support for i.mx6sl
Add cpuidle support for i.MX6SL, currently only support
two cpuidle levels(ARM wfi and WAIT mode), and add software
workaround for WAIT mode errata as below:
ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken
during WAIT mode entry process could cause cache memory
corruption.
Software workaround:
To prevent this issue from occurring, software should ensure that
the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before
entering WAIT mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/cpuidle.h')
-rw-r--r-- | arch/arm/mach-imx/cpuidle.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpuidle.h b/arch/arm/mach-imx/cpuidle.h index 786f98ecc145..24e33670417c 100644 --- a/arch/arm/mach-imx/cpuidle.h +++ b/arch/arm/mach-imx/cpuidle.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #ifdef CONFIG_CPU_IDLE | 13 | #ifdef CONFIG_CPU_IDLE |
14 | extern int imx5_cpuidle_init(void); | 14 | extern int imx5_cpuidle_init(void); |
15 | extern int imx6q_cpuidle_init(void); | 15 | extern int imx6q_cpuidle_init(void); |
16 | extern int imx6sl_cpuidle_init(void); | ||
16 | #else | 17 | #else |
17 | static inline int imx5_cpuidle_init(void) | 18 | static inline int imx5_cpuidle_init(void) |
18 | { | 19 | { |
@@ -22,4 +23,8 @@ static inline int imx6q_cpuidle_init(void) | |||
22 | { | 23 | { |
23 | return 0; | 24 | return 0; |
24 | } | 25 | } |
26 | static inline int imx6sl_cpuidle_init(void) | ||
27 | { | ||
28 | return 0; | ||
29 | } | ||
25 | #endif | 30 | #endif |