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authorAlexander Shiyan <shc_work@mail.ru>2014-07-13 01:34:00 -0400
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 04:11:39 -0400
commitfd4959d8779a8e7099c6ecf4f7c854dbf34890e9 (patch)
tree6a26d8b527816a9c59e36e07378e85c60fa33cbb /arch/arm/mach-imx/clk-imx51-imx53.c
parent6befda9a272b98bfb1dc772efc3564644cbfb270 (diff)
ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets
This patch uses clocksource_of_init() call for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx51-imx53.c')
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index ee579718941c..72d65214223e 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -370,8 +370,6 @@ static void __init mx50_clocks_init(struct device_node *np)
370 370
371 r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); 371 r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
372 clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); 372 clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
373
374 mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt"));
375} 373}
376CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init); 374CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
377 375
@@ -443,9 +441,6 @@ static void __init mx51_clocks_init(struct device_node *np)
443 clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000); 441 clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
444 clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000); 442 clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
445 443
446 /* System timer */
447 mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx51-gpt"));
448
449 clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]); 444 clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
450 imx_print_silicon_rev("i.MX51", mx51_revision()); 445 imx_print_silicon_rev("i.MX51", mx51_revision());
451 clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); 446 clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
@@ -562,7 +557,5 @@ static void __init mx53_clocks_init(struct device_node *np)
562 557
563 r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); 558 r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
564 clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); 559 clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
565
566 mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt"));
567} 560}
568CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init); 561CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);