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authorLinus Torvalds <torvalds@linux-foundation.org>2013-04-11 21:20:31 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-04-11 21:20:31 -0400
commitce6fbaf160628df62ec953c701d5fc547484257a (patch)
treec9c12ddffdd2208b4408d97a1ad56af629e87976 /arch/arm/mach-imx/clk-imx35.c
parent7ee32a6d30d1c8a3b7a07a6269da8f0a08662927 (diff)
parent71bd98aff05a644a2cfc3ac6ca848a586fa210b9 (diff)
Merge tag 'arm-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC bug fixes from Arnd Bergmann: "A little later during the week than the last few pull requests, since there was very little that came in before 3.9-rc6. At least things have calmed down again here. Some important bug fixes that came in over the last 10 days, mostly mvebu and imx: - Multiple regressions on i.mx following the conversion of the clock code, hopefully the last we are seeing of those. - a regression in the mvebu irq handling code - An incorrect register offset in the rewritten s3c24xx irq code. - Two bugs in setting up the iomega_ix2_200 machine - Turning on an extra bus clock on imx - A MAINTAINERS file entry for Roland Stigge" * tag 'arm-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm: mvebu: Fix the irq map function in SMP mode Fix GE0/GE1 init on ix2-200 as GE0 has no PHY ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller ARM: S3C24XX: Correct NR_IRQS definition for s3c2440 ARM i.MX6: Fix ldb_di clock selection ARM: imx: provide twd clock lookup from device tree ARM: imx35 Bugfix admux clock ARM: clk-imx35: Bugfix iomux clock ARM: mxs: Slow down the I2C clock speed MAINTAINERS: Add maintainer for LPC32xx ARM: Kirkwood: Fix typo in the definition of ix2-200 rebuild LED
Diffstat (limited to 'arch/arm/mach-imx/clk-imx35.c')
-rw-r--r--arch/arm/mach-imx/clk-imx35.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index e13a8fa5e62c..2193c834f55c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -257,6 +257,7 @@ int __init mx35_clocks_init(void)
257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); 257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); 258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); 259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
260 clk_register_clkdev(clk[admux_gate], "audmux", NULL);
260 261
261 clk_prepare_enable(clk[spba_gate]); 262 clk_prepare_enable(clk[spba_gate]);
262 clk_prepare_enable(clk[gpio1_gate]); 263 clk_prepare_enable(clk[gpio1_gate]);
@@ -265,6 +266,7 @@ int __init mx35_clocks_init(void)
265 clk_prepare_enable(clk[iim_gate]); 266 clk_prepare_enable(clk[iim_gate]);
266 clk_prepare_enable(clk[emi_gate]); 267 clk_prepare_enable(clk[emi_gate]);
267 clk_prepare_enable(clk[max_gate]); 268 clk_prepare_enable(clk[max_gate]);
269 clk_prepare_enable(clk[iomuxc_gate]);
268 270
269 /* 271 /*
270 * SCC is needed to boot via mmc after a watchdog reset. The clock code 272 * SCC is needed to boot via mmc after a watchdog reset. The clock code