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authorDenis Carikli <denis@eukrea.com>2014-06-25 08:41:36 -0400
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 04:11:32 -0400
commite9db15e3221f2efef205dc1df584a3ca21b58dfa (patch)
treea72fbc693583d1f9b23f6d6af39cb1956f1d5081 /arch/arm/mach-imx/clk-imx25.c
parent988eb354d4de9ca1f1c3faa491d5e67f5513484a (diff)
ARM: i.MX25 clk: Use of_clk_init() for DT case
Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx25.c')
-rw-r--r--arch/arm/mach-imx/clk-imx25.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index e759a6da9407..cab34c3e820b 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -32,8 +32,6 @@
32#include "hardware.h" 32#include "hardware.h"
33#include "mx25.h" 33#include "mx25.h"
34 34
35#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
36
37#define CCM_MPCTL 0x00 35#define CCM_MPCTL 0x00
38#define CCM_UPCTL 0x04 36#define CCM_UPCTL 0x04
39#define CCM_CCTL 0x08 37#define CCM_CCTL 0x08
@@ -56,7 +54,7 @@
56#define CCM_LTR3 0x4c 54#define CCM_LTR3 0x4c
57#define CCM_MCR 0x64 55#define CCM_MCR 0x64
58 56
59#define ccm(x) (CRM_BASE + (x)) 57#define ccm(x) (ccm_base + (x))
60 58
61static struct clk_onecell_data clk_data; 59static struct clk_onecell_data clk_data;
62 60
@@ -91,8 +89,11 @@ enum mx25_clks {
91 89
92static struct clk *clk[clk_max]; 90static struct clk *clk[clk_max];
93 91
94static int __init __mx25_clocks_init(unsigned long osc_rate) 92static int __init __mx25_clocks_init(unsigned long osc_rate,
93 void __iomem *ccm_base)
95{ 94{
95 BUG_ON(!ccm_base);
96
96 clk[dummy] = imx_clk_fixed("dummy", 0); 97 clk[dummy] = imx_clk_fixed("dummy", 0);
97 clk[osc] = imx_clk_fixed("osc", osc_rate); 98 clk[osc] = imx_clk_fixed("osc", osc_rate);
98 clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL)); 99 clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
@@ -240,7 +241,11 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
240 241
241int __init mx25_clocks_init(void) 242int __init mx25_clocks_init(void)
242{ 243{
243 __mx25_clocks_init(24000000); 244 void __iomem *ccm;
245
246 ccm = ioremap(MX25_CRM_BASE_ADDR, SZ_16K);
247
248 __mx25_clocks_init(24000000, ccm);
244 249
245 clk_register_clkdev(clk[gpt1_ipg], "ipg", "imx-gpt.0"); 250 clk_register_clkdev(clk[gpt1_ipg], "ipg", "imx-gpt.0");
246 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); 251 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
@@ -308,29 +313,29 @@ int __init mx25_clocks_init(void)
308 return 0; 313 return 0;
309} 314}
310 315
311int __init mx25_clocks_init_dt(void) 316static void __init mx25_clocks_init_dt(struct device_node *np)
312{ 317{
313 struct device_node *np; 318 struct device_node *refnp;
314 unsigned long osc_rate = 24000000; 319 unsigned long osc_rate = 24000000;
320 void __iomem *ccm;
315 321
316 /* retrieve the freqency of fixed clocks from device tree */ 322 /* retrieve the freqency of fixed clocks from device tree */
317 for_each_compatible_node(np, NULL, "fixed-clock") { 323 for_each_compatible_node(refnp, NULL, "fixed-clock") {
318 u32 rate; 324 u32 rate;
319 if (of_property_read_u32(np, "clock-frequency", &rate)) 325 if (of_property_read_u32(refnp, "clock-frequency", &rate))
320 continue; 326 continue;
321 327
322 if (of_device_is_compatible(np, "fsl,imx-osc")) 328 if (of_device_is_compatible(refnp, "fsl,imx-osc"))
323 osc_rate = rate; 329 osc_rate = rate;
324 } 330 }
325 331
326 np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm"); 332 ccm = of_iomap(np, 0);
333 __mx25_clocks_init(osc_rate, ccm);
334
327 clk_data.clks = clk; 335 clk_data.clks = clk;
328 clk_data.clk_num = ARRAY_SIZE(clk); 336 clk_data.clk_num = ARRAY_SIZE(clk);
329 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); 337 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
330 338
331 __mx25_clocks_init(osc_rate);
332
333 mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt")); 339 mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));
334
335 return 0;
336} 340}
341CLK_OF_DECLARE(imx25_ccm, "fsl,imx25-ccm", mx25_clocks_init_dt);