diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-h720x/cpu-h7202.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-h720x/cpu-h7202.c')
-rw-r--r-- | arch/arm/mach-h720x/cpu-h7202.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index fd33a19c813a..c37d570b852d 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c | |||
@@ -141,27 +141,32 @@ h7202_timer_interrupt(int irq, void *dev_id) | |||
141 | /* | 141 | /* |
142 | * mask multiplexed timer IRQs | 142 | * mask multiplexed timer IRQs |
143 | */ | 143 | */ |
144 | static void inline mask_timerx_irq (u32 irq) | 144 | static void inline __mask_timerx_irq(unsigned int irq) |
145 | { | 145 | { |
146 | unsigned int bit; | 146 | unsigned int bit; |
147 | bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); | 147 | bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); |
148 | CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; | 148 | CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; |
149 | } | 149 | } |
150 | 150 | ||
151 | static void inline mask_timerx_irq(struct irq_data *d) | ||
152 | { | ||
153 | __mask_timerx_irq(d->irq); | ||
154 | } | ||
155 | |||
151 | /* | 156 | /* |
152 | * unmask multiplexed timer IRQs | 157 | * unmask multiplexed timer IRQs |
153 | */ | 158 | */ |
154 | static void inline unmask_timerx_irq (u32 irq) | 159 | static void inline unmask_timerx_irq(struct irq_data *d) |
155 | { | 160 | { |
156 | unsigned int bit; | 161 | unsigned int bit; |
157 | bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); | 162 | bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); |
158 | CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; | 163 | CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; |
159 | } | 164 | } |
160 | 165 | ||
161 | static struct irq_chip h7202_timerx_chip = { | 166 | static struct irq_chip h7202_timerx_chip = { |
162 | .ack = mask_timerx_irq, | 167 | .irq_ack = mask_timerx_irq, |
163 | .mask = mask_timerx_irq, | 168 | .irq_mask = mask_timerx_irq, |
164 | .unmask = unmask_timerx_irq, | 169 | .irq_unmask = unmask_timerx_irq, |
165 | }; | 170 | }; |
166 | 171 | ||
167 | static struct irqaction h7202_timer_irq = { | 172 | static struct irqaction h7202_timer_irq = { |
@@ -196,12 +201,12 @@ void __init h7202_init_irq (void) | |||
196 | 201 | ||
197 | for (irq = IRQ_TIMER1; | 202 | for (irq = IRQ_TIMER1; |
198 | irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { | 203 | irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { |
199 | mask_timerx_irq(irq); | 204 | __mask_timerx_irq(irq); |
200 | set_irq_chip(irq, &h7202_timerx_chip); | 205 | irq_set_chip_and_handler(irq, &h7202_timerx_chip, |
201 | set_irq_handler(irq, handle_edge_irq); | 206 | handle_edge_irq); |
202 | set_irq_flags(irq, IRQF_VALID ); | 207 | set_irq_flags(irq, IRQF_VALID ); |
203 | } | 208 | } |
204 | set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); | 209 | irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); |
205 | 210 | ||
206 | h720x_init_irq(); | 211 | h720x_init_irq(); |
207 | } | 212 | } |