diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-gemini/gpio.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-gemini/gpio.c')
-rw-r--r-- | arch/arm/mach-gemini/gpio.c | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index fe3bd5ac8b10..fdc7ef1391d3 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c | |||
@@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index, | |||
54 | __raw_writel(reg, base + GPIO_INT_EN); | 54 | __raw_writel(reg, base + GPIO_INT_EN); |
55 | } | 55 | } |
56 | 56 | ||
57 | static void gpio_ack_irq(unsigned int irq) | 57 | static void gpio_ack_irq(struct irq_data *d) |
58 | { | 58 | { |
59 | unsigned int gpio = irq_to_gpio(irq); | 59 | unsigned int gpio = irq_to_gpio(d->irq); |
60 | unsigned int base = GPIO_BASE(gpio / 32); | 60 | unsigned int base = GPIO_BASE(gpio / 32); |
61 | 61 | ||
62 | __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); | 62 | __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); |
63 | } | 63 | } |
64 | 64 | ||
65 | static void gpio_mask_irq(unsigned int irq) | 65 | static void gpio_mask_irq(struct irq_data *d) |
66 | { | 66 | { |
67 | unsigned int gpio = irq_to_gpio(irq); | 67 | unsigned int gpio = irq_to_gpio(d->irq); |
68 | unsigned int base = GPIO_BASE(gpio / 32); | 68 | unsigned int base = GPIO_BASE(gpio / 32); |
69 | 69 | ||
70 | _set_gpio_irqenable(base, gpio % 32, 0); | 70 | _set_gpio_irqenable(base, gpio % 32, 0); |
71 | } | 71 | } |
72 | 72 | ||
73 | static void gpio_unmask_irq(unsigned int irq) | 73 | static void gpio_unmask_irq(struct irq_data *d) |
74 | { | 74 | { |
75 | unsigned int gpio = irq_to_gpio(irq); | 75 | unsigned int gpio = irq_to_gpio(d->irq); |
76 | unsigned int base = GPIO_BASE(gpio / 32); | 76 | unsigned int base = GPIO_BASE(gpio / 32); |
77 | 77 | ||
78 | _set_gpio_irqenable(base, gpio % 32, 1); | 78 | _set_gpio_irqenable(base, gpio % 32, 1); |
79 | } | 79 | } |
80 | 80 | ||
81 | static int gpio_set_irq_type(unsigned int irq, unsigned int type) | 81 | static int gpio_set_irq_type(struct irq_data *d, unsigned int type) |
82 | { | 82 | { |
83 | unsigned int gpio = irq_to_gpio(irq); | 83 | unsigned int gpio = irq_to_gpio(d->irq); |
84 | unsigned int gpio_mask = 1 << (gpio % 32); | 84 | unsigned int gpio_mask = 1 << (gpio % 32); |
85 | unsigned int base = GPIO_BASE(gpio / 32); | 85 | unsigned int base = GPIO_BASE(gpio / 32); |
86 | unsigned int reg_both, reg_level, reg_type; | 86 | unsigned int reg_both, reg_level, reg_type; |
@@ -120,15 +120,15 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type) | |||
120 | __raw_writel(reg_level, base + GPIO_INT_LEVEL); | 120 | __raw_writel(reg_level, base + GPIO_INT_LEVEL); |
121 | __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); | 121 | __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); |
122 | 122 | ||
123 | gpio_ack_irq(irq); | 123 | gpio_ack_irq(d->irq); |
124 | 124 | ||
125 | return 0; | 125 | return 0; |
126 | } | 126 | } |
127 | 127 | ||
128 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | 128 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
129 | { | 129 | { |
130 | unsigned int port = (unsigned int)irq_desc_get_handler_data(desc); | ||
130 | unsigned int gpio_irq_no, irq_stat; | 131 | unsigned int gpio_irq_no, irq_stat; |
131 | unsigned int port = (unsigned int)get_irq_data(irq); | ||
132 | 132 | ||
133 | irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); | 133 | irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); |
134 | 134 | ||
@@ -138,18 +138,16 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
138 | if ((irq_stat & 1) == 0) | 138 | if ((irq_stat & 1) == 0) |
139 | continue; | 139 | continue; |
140 | 140 | ||
141 | BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); | 141 | generic_handle_irq(gpio_irq_no); |
142 | irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, | ||
143 | &irq_desc[gpio_irq_no]); | ||
144 | } | 142 | } |
145 | } | 143 | } |
146 | 144 | ||
147 | static struct irq_chip gpio_irq_chip = { | 145 | static struct irq_chip gpio_irq_chip = { |
148 | .name = "GPIO", | 146 | .name = "GPIO", |
149 | .ack = gpio_ack_irq, | 147 | .irq_ack = gpio_ack_irq, |
150 | .mask = gpio_mask_irq, | 148 | .irq_mask = gpio_mask_irq, |
151 | .unmask = gpio_unmask_irq, | 149 | .irq_unmask = gpio_unmask_irq, |
152 | .set_type = gpio_set_irq_type, | 150 | .irq_set_type = gpio_set_irq_type, |
153 | }; | 151 | }; |
154 | 152 | ||
155 | static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, | 153 | static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, |
@@ -219,13 +217,13 @@ void __init gemini_gpio_init(void) | |||
219 | 217 | ||
220 | for (j = GPIO_IRQ_BASE + i * 32; | 218 | for (j = GPIO_IRQ_BASE + i * 32; |
221 | j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { | 219 | j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { |
222 | set_irq_chip(j, &gpio_irq_chip); | 220 | irq_set_chip_and_handler(j, &gpio_irq_chip, |
223 | set_irq_handler(j, handle_edge_irq); | 221 | handle_edge_irq); |
224 | set_irq_flags(j, IRQF_VALID); | 222 | set_irq_flags(j, IRQF_VALID); |
225 | } | 223 | } |
226 | 224 | ||
227 | set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler); | 225 | irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler); |
228 | set_irq_data(IRQ_GPIO(i), (void *)i); | 226 | irq_set_handler_data(IRQ_GPIO(i), (void *)i); |
229 | } | 227 | } |
230 | 228 | ||
231 | BUG_ON(gpiochip_add(&gemini_gpio_chip)); | 229 | BUG_ON(gpiochip_add(&gemini_gpio_chip)); |