diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2013-12-18 14:21:34 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-12-18 15:21:18 -0500 |
commit | df3e9c057e502c0d46ba37cbb67d52904e97b4c4 (patch) | |
tree | b2107be3b5ded418a812b5690ad810106a9d40b9 /arch/arm/mach-exynos | |
parent | 9c9239afe31f67d137ba6c45b244b509c2090567 (diff) |
cpufreq: exynos: move definitions for exynos-cpufreq into drivers/cpufreq/
This moves regarding exynos-cpufreq definitions into drivers/cpufreq/
exynos-cpufreq.h because they are used only for the cpufreq driver.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/regs-clock.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index 5acc06e4bca8..22afe63e8c30 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h | |||
@@ -18,27 +18,6 @@ | |||
18 | 18 | ||
19 | #define EXYNOS_CLKREG(x) (S5P_VA_CMU + (x)) | 19 | #define EXYNOS_CLKREG(x) (S5P_VA_CMU + (x)) |
20 | 20 | ||
21 | #define EXYNOS4_CLKSRC_CPU EXYNOS_CLKREG(0x14200) | ||
22 | #define EXYNOS4_CLKMUX_STATCPU EXYNOS_CLKREG(0x14400) | ||
23 | |||
24 | #define EXYNOS4_CLKDIV_CPU EXYNOS_CLKREG(0x14500) | ||
25 | #define EXYNOS4_CLKDIV_CPU1 EXYNOS_CLKREG(0x14504) | ||
26 | #define EXYNOS4_CLKDIV_STATCPU EXYNOS_CLKREG(0x14600) | ||
27 | #define EXYNOS4_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x14604) | ||
28 | |||
29 | #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16) | ||
30 | #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT) | ||
31 | |||
32 | /* For EXYNOS5250 */ | ||
33 | |||
34 | #define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000) | ||
35 | #define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100) | ||
36 | #define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400) | ||
37 | #define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500) | ||
38 | #define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504) | ||
39 | #define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600) | ||
40 | #define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604) | ||
41 | |||
42 | #define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020) | 21 | #define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020) |
43 | #define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024) | 22 | #define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024) |
44 | 23 | ||