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authorTomasz Figa <t.figa@samsung.com>2013-06-14 20:04:55 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-06-14 20:33:06 -0400
commitd243997f125e92123932f0a2efaa63f1a76b3482 (patch)
tree16e95510ce3d646c53e5565015c7c6e440b3ad31 /arch/arm/mach-exynos
parenta6c8d8a1a4d26e88e462f4f871f330fd417422be (diff)
ARM: EXYNOS: Remove legacy interrupt initialization code
This patch removes legacy IRQ initialization code that was used to set up interrupt handling when booting with ATAGS, which is not supported any more. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/common.c30
1 files changed, 1 insertions, 29 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 598e4b89ddd8..9626ce4f1346 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -41,7 +41,6 @@
41#include <mach/regs-irq.h> 41#include <mach/regs-irq.h>
42#include <mach/regs-pmu.h> 42#include <mach/regs-pmu.h>
43#include <mach/regs-gpio.h> 43#include <mach/regs-gpio.h>
44#include <mach/irqs.h>
45 44
46#include <plat/cpu.h> 45#include <plat/cpu.h>
47#include <plat/devs.h> 46#include <plat/devs.h>
@@ -486,41 +485,14 @@ void __init exynos_init_time(void)
486 } 485 }
487} 486}
488 487
489static unsigned int max_combiner_nr(void)
490{
491 if (soc_is_exynos5250())
492 return EXYNOS5_MAX_COMBINER_NR;
493 else if (soc_is_exynos4412())
494 return EXYNOS4412_MAX_COMBINER_NR;
495 else if (soc_is_exynos4212())
496 return EXYNOS4212_MAX_COMBINER_NR;
497 else
498 return EXYNOS4210_MAX_COMBINER_NR;
499}
500
501
502void __init exynos4_init_irq(void) 488void __init exynos4_init_irq(void)
503{ 489{
504 unsigned int gic_bank_offset; 490 irqchip_init();
505
506 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
507
508 if (!of_have_populated_dt())
509 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
510 else
511 irqchip_init();
512
513 if (!of_have_populated_dt())
514 combiner_init(S5P_VA_COMBINER_BASE, NULL,
515 max_combiner_nr(), COMBINER_IRQ(0, 0));
516
517 gic_arch_extn.irq_set_wake = s3c_irq_wake;
518} 491}
519 492
520void __init exynos5_init_irq(void) 493void __init exynos5_init_irq(void)
521{ 494{
522 irqchip_init(); 495 irqchip_init();
523 gic_arch_extn.irq_set_wake = s3c_irq_wake;
524} 496}
525 497
526struct bus_type exynos_subsys = { 498struct bus_type exynos_subsys = {