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authorChander Kashyap <chander.kashyap@linaro.org>2013-06-18 11:29:34 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-06-18 15:09:33 -0400
commitc6fd0fe85ab761829102b60d590d0fdd71a649bd (patch)
tree8f38ef31311f2502e278c6f2f03c0a0a7374a8a9 /arch/arm/mach-exynos
parent33f881365f212a59b83b9cb2e66e15aceee99ddb (diff)
ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family
Use chipid[27:20] bits to identify the EXYNOS family while setting up the serial port during the uncompression setup. This uses four additional bits of chipid to identify the EXYNOS family since this is required for identifying EXYNOS5420 SoC. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 2979995d5a6a..1937e0fb7375 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -31,13 +31,12 @@ static void arch_detect_cpu(void)
31 31
32 /* 32 /*
33 * product_id is bits 31:12 33 * product_id is bits 31:12
34 * bits 23:20 describe the exynosX family 34 * bits 23:20 describe the exynosX family
35 * 35 * bits 27:24 describe the exynosX family in exynos5420
36 */ 36 */
37 chip_id >>= 20; 37 chip_id >>= 20;
38 chip_id &= 0xf;
39 38
40 if (chip_id == 0x5) 39 if ((chip_id & 0x0f) == 0x5 || (chip_id & 0xf0) == 0x50)
41 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 40 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
42 else 41 else
43 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 42 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);