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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-09 17:18:35 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-09 17:18:35 -0500
commit6c9e92476bc924ede6d6d2f0bfed2c06ae148d29 (patch)
tree1c9972cf4f4b484d6203844c396b0c232379f1f1 /arch/arm/mach-exynos
parent0563fdc0d9fbd4d8896956d4aeb01fad09146acc (diff)
parentef1dfa7332e9205b532da1c2d286757ce511cd1d (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann: "The remaining cleanups for 3.19 are to a large part result of devicetree conversion nearing completion on two other platforms besides AT91: - Like AT91, Renesas shmobile is in the process to migrate to DT and multiplatform, but using a different approach of doing it one SoC at a time. For 3.19, the r8a7791 platform and associated "Koelsch" board are considered complete and we remove the non-DT non-multiplatform support for this. - The ARM Versatile Express has supported DT and multiplatform for a long time, but we have still kept the legacy board files around, because not all drivers were fully working before. We have finally taken the last step to remove the board files. Other changes in this branch are preparation for the later branches or just unrelated to the more interesting changes: - The dts files for arm64 get moved into per-vendor directories for a clearer structure. - Some dead code removal (zynq, exynos, davinci, imx) - Using pr_*() macros more consistently instead of printk(KERN_*) in some platform code" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (71 commits) ARM: zynq: Remove secondary_startup() declaration from header ARM: vexpress: Enable regulator framework when MMCI is in use ARM: vexpress: Remove non-DT code ARM: imx: Remove unneeded .map_io initialization ARM: dts: imx6qdl-sabresd: Fix the microphone route ARM: imx: refactor mxc_iomux_mode() ARM: imx: simplify clk_pllv3_prepare() ARM: imx6q: drop unnecessary semicolon ARM: imx: clean up machine mxc_arch_reset_init_dt reset init ARM: dts: imx6qdl-rex: Remove unneeded 'fsl,mode' property ARM: dts: imx6qdl-gw5x: Remove unneeded 'fsl,mode' property ARM: dts: imx6qdl-sabresd: Use IMX6QDL_CLK_CKO define ARM: at91: remove useless init_time for DT-only SoCs ARM: davinci: Remove redundant casts ARM: davinci: Use standard logging styles ARM: shmobile: r8a7779: Spelling/grammar s/entity/identity/, s/map/mapping/ ARM: shmobile: sh7372: Spelling/grammar s/entity map/identity mapping/ ARM: shmobile: sh73a0: Spelling/grammar s/entity map/identity mapping/ ARM: EXYNOS: Remove unused static iomapping ARM: at91: fix build breakage due to legacy board removals ...
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/Makefile3
-rw-r--r--arch/arm/mach-exynos/common.h2
-rw-r--r--arch/arm/mach-exynos/exynos.c50
-rw-r--r--arch/arm/mach-exynos/hotplug.c91
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h23
-rw-r--r--arch/arm/mach-exynos/platsmp.c113
-rw-r--r--arch/arm/mach-exynos/regs-pmu.h3
7 files changed, 116 insertions, 169 deletions
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 27ae6144679c..d634de588d96 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -16,9 +16,6 @@ obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
16 16
17obj-$(CONFIG_SMP) += platsmp.o headsmp.o 17obj-$(CONFIG_SMP) += platsmp.o headsmp.o
18 18
19obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
20CFLAGS_hotplug.o += -march=armv7-a
21
22plus_sec := $(call as-instr,.arch_extension sec,+sec) 19plus_sec := $(call as-instr,.arch_extension sec,+sec)
23AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) 20AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
24 21
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 47b904b3b973..3d3e6af9d015 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -130,8 +130,6 @@ extern void exynos_cpu_resume(void);
130 130
131extern struct smp_operations exynos_smp_ops; 131extern struct smp_operations exynos_smp_ops;
132 132
133extern void exynos_cpu_die(unsigned int cpu);
134
135/* PMU(Power Management Unit) support */ 133/* PMU(Power Management Unit) support */
136 134
137#define PMU_TABLE_END (-1U) 135#define PMU_TABLE_END (-1U)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 6b283eb3202e..6de7cf5ef2b2 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -41,41 +41,11 @@ static struct map_desc exynos4_iodesc[] __initdata = {
41 .length = SZ_64K, 41 .length = SZ_64K,
42 .type = MT_DEVICE, 42 .type = MT_DEVICE,
43 }, { 43 }, {
44 .virtual = (unsigned long)S3C_VA_TIMER,
45 .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
46 .length = SZ_16K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)S3C_VA_WATCHDOG,
50 .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_SROMC, 44 .virtual = (unsigned long)S5P_VA_SROMC,
55 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), 45 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
56 .length = SZ_4K, 46 .length = SZ_4K,
57 .type = MT_DEVICE, 47 .type = MT_DEVICE,
58 }, { 48 }, {
59 .virtual = (unsigned long)S5P_VA_SYSTIMER,
60 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
65 .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (unsigned long)S5P_VA_GIC_CPU,
70 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
71 .length = SZ_64K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = (unsigned long)S5P_VA_GIC_DIST,
75 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
76 .length = SZ_64K,
77 .type = MT_DEVICE,
78 }, {
79 .virtual = (unsigned long)S5P_VA_CMU, 49 .virtual = (unsigned long)S5P_VA_CMU,
80 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 50 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
81 .length = SZ_128K, 51 .length = SZ_128K,
@@ -86,11 +56,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
86 .length = SZ_8K, 56 .length = SZ_8K,
87 .type = MT_DEVICE, 57 .type = MT_DEVICE,
88 }, { 58 }, {
89 .virtual = (unsigned long)S5P_VA_L2CC,
90 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
91 .length = SZ_4K,
92 .type = MT_DEVICE,
93 }, {
94 .virtual = (unsigned long)S5P_VA_DMC0, 59 .virtual = (unsigned long)S5P_VA_DMC0,
95 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), 60 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
96 .length = SZ_64K, 61 .length = SZ_64K,
@@ -100,11 +65,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
100 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), 65 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
101 .length = SZ_64K, 66 .length = SZ_64K,
102 .type = MT_DEVICE, 67 .type = MT_DEVICE,
103 }, {
104 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
105 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
106 .length = SZ_4K,
107 .type = MT_DEVICE,
108 }, 68 },
109}; 69};
110 70
@@ -115,16 +75,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
115 .length = SZ_64K, 75 .length = SZ_64K,
116 .type = MT_DEVICE, 76 .type = MT_DEVICE,
117 }, { 77 }, {
118 .virtual = (unsigned long)S3C_VA_TIMER,
119 .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER),
120 .length = SZ_16K,
121 .type = MT_DEVICE,
122 }, {
123 .virtual = (unsigned long)S3C_VA_WATCHDOG,
124 .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
125 .length = SZ_4K,
126 .type = MT_DEVICE,
127 }, {
128 .virtual = (unsigned long)S5P_VA_SROMC, 78 .virtual = (unsigned long)S5P_VA_SROMC,
129 .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), 79 .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
130 .length = SZ_4K, 80 .length = SZ_4K,
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
deleted file mode 100644
index 4d86961a7957..000000000000
--- a/arch/arm/mach-exynos/hotplug.c
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * Cloned from linux/arch/arm/mach-realview/hotplug.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/errno.h>
14#include <linux/smp.h>
15#include <linux/io.h>
16
17#include <asm/cacheflush.h>
18#include <asm/cp15.h>
19#include <asm/smp_plat.h>
20
21#include "common.h"
22#include "regs-pmu.h"
23
24static inline void cpu_leave_lowpower(void)
25{
26 unsigned int v;
27
28 asm volatile(
29 "mrc p15, 0, %0, c1, c0, 0\n"
30 " orr %0, %0, %1\n"
31 " mcr p15, 0, %0, c1, c0, 0\n"
32 " mrc p15, 0, %0, c1, c0, 1\n"
33 " orr %0, %0, %2\n"
34 " mcr p15, 0, %0, c1, c0, 1\n"
35 : "=&r" (v)
36 : "Ir" (CR_C), "Ir" (0x40)
37 : "cc");
38}
39
40static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
41{
42 u32 mpidr = cpu_logical_map(cpu);
43 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
44
45 for (;;) {
46
47 /* Turn the CPU off on next WFI instruction. */
48 exynos_cpu_power_down(core_id);
49
50 wfi();
51
52 if (pen_release == core_id) {
53 /*
54 * OK, proper wakeup, we're done
55 */
56 break;
57 }
58
59 /*
60 * Getting here, means that we have come out of WFI without
61 * having been woken up - this shouldn't happen
62 *
63 * Just note it happening - when we're woken, we can report
64 * its occurrence.
65 */
66 (*spurious)++;
67 }
68}
69
70/*
71 * platform-specific code to shutdown a CPU
72 *
73 * Called with IRQs disabled
74 */
75void __ref exynos_cpu_die(unsigned int cpu)
76{
77 int spurious = 0;
78
79 v7_exit_coherency_flush(louis);
80
81 platform_do_lowpower(cpu, &spurious);
82
83 /*
84 * bring this CPU back into the world of cache
85 * coherency, and then restore interrupts
86 */
87 cpu_leave_lowpower();
88
89 if (spurious)
90 pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
91}
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index f0b7e92bad6c..1ad3f496ef56 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -30,40 +30,17 @@
30#define EXYNOS4_PA_CMU 0x10030000 30#define EXYNOS4_PA_CMU 0x10030000
31#define EXYNOS5_PA_CMU 0x10010000 31#define EXYNOS5_PA_CMU 0x10010000
32 32
33#define EXYNOS4_PA_SYSTIMER 0x10050000
34
35#define EXYNOS4_PA_WATCHDOG 0x10060000
36#define EXYNOS5_PA_WATCHDOG 0x101D0000
37
38#define EXYNOS4_PA_DMC0 0x10400000 33#define EXYNOS4_PA_DMC0 0x10400000
39#define EXYNOS4_PA_DMC1 0x10410000 34#define EXYNOS4_PA_DMC1 0x10410000
40 35
41#define EXYNOS4_PA_COMBINER 0x10440000
42#define EXYNOS5_PA_COMBINER 0x10440000
43
44#define EXYNOS4_PA_GIC_CPU 0x10480000
45#define EXYNOS4_PA_GIC_DIST 0x10490000
46#define EXYNOS5_PA_GIC_CPU 0x10482000
47#define EXYNOS5_PA_GIC_DIST 0x10481000
48
49#define EXYNOS4_PA_COREPERI 0x10500000 36#define EXYNOS4_PA_COREPERI 0x10500000
50#define EXYNOS4_PA_L2CC 0x10502000 37#define EXYNOS4_PA_L2CC 0x10502000
51 38
52#define EXYNOS4_PA_SROMC 0x12570000 39#define EXYNOS4_PA_SROMC 0x12570000
53#define EXYNOS5_PA_SROMC 0x12250000 40#define EXYNOS5_PA_SROMC 0x12250000
54 41
55#define EXYNOS4_PA_HSPHY 0x125B0000
56
57#define EXYNOS4_PA_UART 0x13800000
58#define EXYNOS5_PA_UART 0x12C00000
59
60#define EXYNOS4_PA_TIMER 0x139D0000
61#define EXYNOS5_PA_TIMER 0x12DD0000
62
63/* Compatibility UART */ 42/* Compatibility UART */
64 43
65#define EXYNOS5440_PA_UART0 0x000B0000 44#define EXYNOS5440_PA_UART0 0x000B0000
66 45
67#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
68
69#endif /* __ASM_ARCH_MAP_H */ 46#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 41ae28d69e6f..9c6dd1451136 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -22,6 +22,7 @@
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/cp15.h>
25#include <asm/smp_plat.h> 26#include <asm/smp_plat.h>
26#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
27#include <asm/firmware.h> 28#include <asm/firmware.h>
@@ -33,6 +34,88 @@
33 34
34extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
35 36
37/*
38 * Set or clear the USE_DELAYED_RESET_ASSERTION option, set on Exynos4 SoCs
39 * during hot-(un)plugging CPUx.
40 *
41 * The feature can be cleared safely during first boot of secondary CPU.
42 *
43 * Exynos4 SoCs require setting USE_DELAYED_RESET_ASSERTION during powering
44 * down a CPU so the CPU idle clock down feature could properly detect global
45 * idle state when CPUx is off.
46 */
47static void exynos_set_delayed_reset_assertion(u32 core_id, bool enable)
48{
49 if (soc_is_exynos4()) {
50 unsigned int tmp;
51
52 tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
53 if (enable)
54 tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
55 else
56 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
57 pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
58 }
59}
60
61#ifdef CONFIG_HOTPLUG_CPU
62static inline void cpu_leave_lowpower(u32 core_id)
63{
64 unsigned int v;
65
66 asm volatile(
67 "mrc p15, 0, %0, c1, c0, 0\n"
68 " orr %0, %0, %1\n"
69 " mcr p15, 0, %0, c1, c0, 0\n"
70 " mrc p15, 0, %0, c1, c0, 1\n"
71 " orr %0, %0, %2\n"
72 " mcr p15, 0, %0, c1, c0, 1\n"
73 : "=&r" (v)
74 : "Ir" (CR_C), "Ir" (0x40)
75 : "cc");
76
77 exynos_set_delayed_reset_assertion(core_id, false);
78}
79
80static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
81{
82 u32 mpidr = cpu_logical_map(cpu);
83 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
84
85 for (;;) {
86
87 /* Turn the CPU off on next WFI instruction. */
88 exynos_cpu_power_down(core_id);
89
90 /*
91 * Exynos4 SoCs require setting
92 * USE_DELAYED_RESET_ASSERTION so the CPU idle
93 * clock down feature could properly detect
94 * global idle state when CPUx is off.
95 */
96 exynos_set_delayed_reset_assertion(core_id, true);
97
98 wfi();
99
100 if (pen_release == core_id) {
101 /*
102 * OK, proper wakeup, we're done
103 */
104 break;
105 }
106
107 /*
108 * Getting here, means that we have come out of WFI without
109 * having been woken up - this shouldn't happen
110 *
111 * Just note it happening - when we're woken, we can report
112 * its occurrence.
113 */
114 (*spurious)++;
115 }
116}
117#endif /* CONFIG_HOTPLUG_CPU */
118
36/** 119/**
37 * exynos_core_power_down : power down the specified cpu 120 * exynos_core_power_down : power down the specified cpu
38 * @cpu : the cpu to power down 121 * @cpu : the cpu to power down
@@ -237,6 +320,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
237 udelay(10); 320 udelay(10);
238 } 321 }
239 322
323 /* No harm if this is called during first boot of secondary CPU */
324 exynos_set_delayed_reset_assertion(core_id, false);
325
240 /* 326 /*
241 * now the secondary core is starting up let it run its 327 * now the secondary core is starting up let it run its
242 * calibrations, then wait for it to finish 328 * calibrations, then wait for it to finish
@@ -318,6 +404,33 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
318 } 404 }
319} 405}
320 406
407#ifdef CONFIG_HOTPLUG_CPU
408/*
409 * platform-specific code to shutdown a CPU
410 *
411 * Called with IRQs disabled
412 */
413static void exynos_cpu_die(unsigned int cpu)
414{
415 int spurious = 0;
416 u32 mpidr = cpu_logical_map(cpu);
417 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
418
419 v7_exit_coherency_flush(louis);
420
421 platform_do_lowpower(cpu, &spurious);
422
423 /*
424 * bring this CPU back into the world of cache
425 * coherency, and then restore interrupts
426 */
427 cpu_leave_lowpower(core_id);
428
429 if (spurious)
430 pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
431}
432#endif /* CONFIG_HOTPLUG_CPU */
433
321struct smp_operations exynos_smp_ops __initdata = { 434struct smp_operations exynos_smp_ops __initdata = {
322 .smp_init_cpus = exynos_smp_init_cpus, 435 .smp_init_cpus = exynos_smp_init_cpus,
323 .smp_prepare_cpus = exynos_smp_prepare_cpus, 436 .smp_prepare_cpus = exynos_smp_prepare_cpus,
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 96a1569262b5..4e9b4440e2bd 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -20,6 +20,7 @@
20 20
21#define S5P_USE_STANDBY_WFI0 (1 << 16) 21#define S5P_USE_STANDBY_WFI0 (1 << 16)
22#define S5P_USE_STANDBY_WFE0 (1 << 24) 22#define S5P_USE_STANDBY_WFE0 (1 << 24)
23#define S5P_USE_DELAYED_RESET_ASSERTION BIT(12)
23 24
24#define EXYNOS_SWRESET 0x0400 25#define EXYNOS_SWRESET 0x0400
25#define EXYNOS5440_SWRESET 0x00C4 26#define EXYNOS5440_SWRESET 0x00C4
@@ -106,6 +107,8 @@
106 (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr))) 107 (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
107#define EXYNOS_ARM_CORE_STATUS(_nr) \ 108#define EXYNOS_ARM_CORE_STATUS(_nr) \
108 (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4) 109 (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)
110#define EXYNOS_ARM_CORE_OPTION(_nr) \
111 (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x8)
109 112
110#define EXYNOS_ARM_COMMON_CONFIGURATION 0x2500 113#define EXYNOS_ARM_COMMON_CONFIGURATION 0x2500
111#define EXYNOS_COMMON_CONFIGURATION(_nr) \ 114#define EXYNOS_COMMON_CONFIGURATION(_nr) \