diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2011-11-16 11:19:11 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-16 19:18:53 -0500 |
commit | 63b870f149cdcd253ae8da88d8b5a0b43a68965c (patch) | |
tree | e95389973c299474d1c8191cac7bef82ab3c4561 /arch/arm/mach-exynos | |
parent | 1ea6b8f48918282bdca0b32a34095504ee65bab5 (diff) |
ARM: EXYNOS: remove exynos4_scu_enable()
The exynos4_scu_enable() is a duplication of scu_enable(). Since
commit '26a527e ARM: 7100/1: smp_scu: remove __init annotation from
scu_enable()' makes scu_enable() available for non-init codes, exynos
can directly call scu_enable() and save exynos4_scu_enable() now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[kgene.kim@samsung.com: added missing header]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 24 |
1 files changed, 2 insertions, 22 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 509a435afd4b..4093fea849c3 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/hardware/cache-l2x0.h> | 25 | #include <asm/hardware/cache-l2x0.h> |
26 | #include <asm/smp_scu.h> | ||
26 | 27 | ||
27 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
28 | #include <plat/pm.h> | 29 | #include <plat/pm.h> |
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev) | |||
213 | return 0; | 214 | return 0; |
214 | } | 215 | } |
215 | 216 | ||
216 | /* This function copy from linux/arch/arm/kernel/smp_scu.c */ | ||
217 | |||
218 | void exynos4_scu_enable(void __iomem *scu_base) | ||
219 | { | ||
220 | u32 scu_ctrl; | ||
221 | |||
222 | scu_ctrl = __raw_readl(scu_base); | ||
223 | /* already enabled? */ | ||
224 | if (scu_ctrl & 1) | ||
225 | return; | ||
226 | |||
227 | scu_ctrl |= 1; | ||
228 | __raw_writel(scu_ctrl, scu_base); | ||
229 | |||
230 | /* | ||
231 | * Ensure that the data accessed by CPU0 before the SCU was | ||
232 | * initialised is visible to the other CPUs. | ||
233 | */ | ||
234 | flush_cache_all(); | ||
235 | } | ||
236 | |||
237 | static unsigned long pll_base_rate; | 217 | static unsigned long pll_base_rate; |
238 | 218 | ||
239 | static void exynos4_restore_pll(void) | 219 | static void exynos4_restore_pll(void) |
@@ -402,7 +382,7 @@ static void exynos4_pm_resume(void) | |||
402 | 382 | ||
403 | exynos4_restore_pll(); | 383 | exynos4_restore_pll(); |
404 | 384 | ||
405 | exynos4_scu_enable(S5P_VA_SCU); | 385 | scu_enable(S5P_VA_SCU); |
406 | 386 | ||
407 | #ifdef CONFIG_CACHE_L2X0 | 387 | #ifdef CONFIG_CACHE_L2X0 |
408 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); | 388 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); |