ARM: exynos: fix l2x0 saved regs handling

The exynos4_l2x0_cache_init function tries to flush the data cache
for the location of the saved l2x0 registers and pass the physical
address to the s5p-sleep implementation.

However, the s5p-sleep code is optional, and if it is disabled,
we get a linker error here when the l2x0_regs_phys variable does
not exist.

To solve this, use a compile-time conditional to drop this code
if we don't want it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f18be40e5b21..8d0042c9d4d3 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -404,8 +404,10 @@ static int __init exynos4_l2x0_cache_init(void)
         if (ret)
                 return ret;
 
-        l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
-        clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+        if (IS_ENABLED(CONFIG_S5P_SLEEP)) {
+                l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+                clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+        }
         return 0;
 }
 early_initcall(exynos4_l2x0_cache_init);