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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 14:06:17 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 14:06:17 -0400 |
commit | 38f56f33ca381751f9b8910f67e7a805ec0b68cb (patch) | |
tree | 202f2ce60f3f43a948607ec76c8cc48c1cf73a4b /arch/arm/mach-exynos | |
parent | fcba914542082b272f31c8e4c40000b88ed3208d (diff) | |
parent | 4183bef2e093a2f0aab45f2d5fed82b0e02aeacf (diff) |
Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
"These are mostly new device tree bindings for existing drivers, as
well as changes to the device tree source files to add support for
those devices, and a couple of new boards, most notably Samsung's
Exynos5 based Chromebook.
The changes depend on earlier platform specific updates and touch the
usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."
* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: add mshc controller node for Exynos4x12 SoCs
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
ARM: dts: mvebu: introduce internal-regs node
ARM: dts: mvebu: Convert all the mvebu files to use the range property
ARM: dts: mvebu: move all peripherals inside soc
ARM: dts: mvebu: fix cpus section indentation
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
...
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 53 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 1 |
2 files changed, 30 insertions, 24 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 46089fe24705..d126f26dbbf1 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -120,17 +120,6 @@ static struct map_desc exynos_iodesc[] __initdata = { | |||
120 | }, | 120 | }, |
121 | }; | 121 | }; |
122 | 122 | ||
123 | #ifdef CONFIG_ARCH_EXYNOS5 | ||
124 | static struct map_desc exynos5440_iodesc[] __initdata = { | ||
125 | { | ||
126 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
127 | .pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID), | ||
128 | .length = SZ_4K, | ||
129 | .type = MT_DEVICE, | ||
130 | }, | ||
131 | }; | ||
132 | #endif | ||
133 | |||
134 | static struct map_desc exynos4_iodesc[] __initdata = { | 123 | static struct map_desc exynos4_iodesc[] __initdata = { |
135 | { | 124 | { |
136 | .virtual = (unsigned long)S3C_VA_SYS, | 125 | .virtual = (unsigned long)S3C_VA_SYS, |
@@ -348,6 +337,31 @@ void __init exynos_init_late(void) | |||
348 | exynos_pm_late_initcall(); | 337 | exynos_pm_late_initcall(); |
349 | } | 338 | } |
350 | 339 | ||
340 | #ifdef CONFIG_OF | ||
341 | int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, | ||
342 | int depth, void *data) | ||
343 | { | ||
344 | struct map_desc iodesc; | ||
345 | __be32 *reg; | ||
346 | unsigned long len; | ||
347 | |||
348 | if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && | ||
349 | !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock")) | ||
350 | return 0; | ||
351 | |||
352 | reg = of_get_flat_dt_prop(node, "reg", &len); | ||
353 | if (reg == NULL || len != (sizeof(unsigned long) * 2)) | ||
354 | return 0; | ||
355 | |||
356 | iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); | ||
357 | iodesc.length = be32_to_cpu(reg[1]) - 1; | ||
358 | iodesc.virtual = (unsigned long)S5P_VA_CHIPID; | ||
359 | iodesc.type = MT_DEVICE; | ||
360 | iotable_init(&iodesc, 1); | ||
361 | return 1; | ||
362 | } | ||
363 | #endif | ||
364 | |||
351 | /* | 365 | /* |
352 | * exynos_map_io | 366 | * exynos_map_io |
353 | * | 367 | * |
@@ -356,19 +370,12 @@ void __init exynos_init_late(void) | |||
356 | 370 | ||
357 | void __init exynos_init_io(struct map_desc *mach_desc, int size) | 371 | void __init exynos_init_io(struct map_desc *mach_desc, int size) |
358 | { | 372 | { |
359 | struct map_desc *iodesc = exynos_iodesc; | 373 | #ifdef CONFIG_OF |
360 | int iodesc_sz = ARRAY_SIZE(exynos_iodesc); | 374 | if (initial_boot_params) |
361 | #if defined(CONFIG_OF) && defined(CONFIG_ARCH_EXYNOS5) | 375 | of_scan_flat_dt(exynos_fdt_map_chipid, NULL); |
362 | unsigned long root = of_get_flat_dt_root(); | 376 | else |
363 | |||
364 | /* initialize the io descriptors we need for initialization */ | ||
365 | if (of_flat_dt_is_compatible(root, "samsung,exynos5440")) { | ||
366 | iodesc = exynos5440_iodesc; | ||
367 | iodesc_sz = ARRAY_SIZE(exynos5440_iodesc); | ||
368 | } | ||
369 | #endif | 377 | #endif |
370 | 378 | iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); | |
371 | iotable_init(iodesc, iodesc_sz); | ||
372 | 379 | ||
373 | if (mach_desc) | 380 | if (mach_desc) |
374 | iotable_init(mach_desc, size); | 381 | iotable_init(mach_desc, size); |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 99e0a79f3b1f..92b29bb583cb 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -56,7 +56,6 @@ | |||
56 | #define EXYNOS4_PA_ONENAND_DMA 0x0C600000 | 56 | #define EXYNOS4_PA_ONENAND_DMA 0x0C600000 |
57 | 57 | ||
58 | #define EXYNOS_PA_CHIPID 0x10000000 | 58 | #define EXYNOS_PA_CHIPID 0x10000000 |
59 | #define EXYNOS5440_PA_CHIPID 0x00160000 | ||
60 | 59 | ||
61 | #define EXYNOS4_PA_SYSCON 0x10010000 | 60 | #define EXYNOS4_PA_SYSCON 0x10010000 |
62 | #define EXYNOS5_PA_SYSCON 0x10050100 | 61 | #define EXYNOS5_PA_SYSCON 0x10050100 |