diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:30:28 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:30:28 -0500 |
commit | 190a44e65b0f32eaf5b4db3969f5eb224f83a7a2 (patch) | |
tree | 577c9a3949ba06e62d082eb11894b7045ebe3ef3 /arch/arm/mach-exynos | |
parent | dfc1ebe76663d582a01c9dc572395cf8086d01de (diff) | |
parent | b48741cce3be32a48af9a2b272f3f13a077375cf (diff) |
Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Cleanups for the Samsung platforms
Various cleanup changes that the device driver changes are built upon.
Since the samsung cleanups depend on the device tree series, which
depends on the first set of cleanups for tegra.
* tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: Use gpio_request_one
ARM: S5PV210: Use gpio_request_one
ARM: S3C64XX: Modified according to SPI consolidation work
ARM: S5PV210: Modified files for SPI consolidation work
ARM: S5P64X0: Modified files for SPI consolidation work
ARM: S5PC100: Modified files for SPI consolidation work
ARM: S3C64XX: Modified files for SPI consolidation work
ARM: SAMSUNG: Consolidation of SPI platform devices to plat-samsung
ARM: SAMSUNG: Remove SPI bus clocks from platform data
ARM: S5PV210: Add SPI clkdev support
ARM: S5P64X0: Add SPI clkdev support
ARM: S5PC100: Add SPI clkdev support
ARM: S3C64XX: Add SPI clkdev support
spi/s3c64xx: Use bus clocks created using clkdev
mmc: sdhci-s3c: Use generic clock names for sdhci bus clock options
ARM: SAMSUNG: Add lookup of sdhci-s3c clocks using generic names
ARM: SAMSUNG: Remove SDHCI bus clocks from platform data
ARM: SAMSUNG: Use kmemdup rather than duplicating its implementation
ARM: EXYNOS: remove exynos4_scu_enable()
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/clock.c | 88 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-nuri.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-smdkv310.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-universal_c210.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-exynos/setup-sdhci.c | 22 |
7 files changed, 60 insertions, 98 deletions
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index fd0d9e9be382..ca85a99c159d 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -61,6 +61,5 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C5) += setup-i2c5.o | |||
61 | obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o | 61 | obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o |
62 | obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o | 62 | obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o |
63 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o | 63 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o |
64 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o | ||
65 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 64 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
66 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o | 65 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o |
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index befee4e13391..5d5250df33fd 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c | |||
@@ -1157,42 +1157,6 @@ static struct clksrc_clk clksrcs[] = { | |||
1157 | .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 }, | 1157 | .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 }, |
1158 | }, { | 1158 | }, { |
1159 | .clk = { | 1159 | .clk = { |
1160 | .name = "sclk_mmc", | ||
1161 | .devname = "s3c-sdhci.0", | ||
1162 | .parent = &clk_dout_mmc0.clk, | ||
1163 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1164 | .ctrlbit = (1 << 0), | ||
1165 | }, | ||
1166 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 }, | ||
1167 | }, { | ||
1168 | .clk = { | ||
1169 | .name = "sclk_mmc", | ||
1170 | .devname = "s3c-sdhci.1", | ||
1171 | .parent = &clk_dout_mmc1.clk, | ||
1172 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1173 | .ctrlbit = (1 << 4), | ||
1174 | }, | ||
1175 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 }, | ||
1176 | }, { | ||
1177 | .clk = { | ||
1178 | .name = "sclk_mmc", | ||
1179 | .devname = "s3c-sdhci.2", | ||
1180 | .parent = &clk_dout_mmc2.clk, | ||
1181 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1182 | .ctrlbit = (1 << 8), | ||
1183 | }, | ||
1184 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 }, | ||
1185 | }, { | ||
1186 | .clk = { | ||
1187 | .name = "sclk_mmc", | ||
1188 | .devname = "s3c-sdhci.3", | ||
1189 | .parent = &clk_dout_mmc3.clk, | ||
1190 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1191 | .ctrlbit = (1 << 12), | ||
1192 | }, | ||
1193 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, | ||
1194 | }, { | ||
1195 | .clk = { | ||
1196 | .name = "sclk_dwmmc", | 1160 | .name = "sclk_dwmmc", |
1197 | .parent = &clk_dout_mmc4.clk, | 1161 | .parent = &clk_dout_mmc4.clk, |
1198 | .enable = exynos4_clksrc_mask_fsys_ctrl, | 1162 | .enable = exynos4_clksrc_mask_fsys_ctrl, |
@@ -1250,6 +1214,50 @@ static struct clksrc_clk clk_sclk_uart3 = { | |||
1250 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 }, | 1214 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 }, |
1251 | }; | 1215 | }; |
1252 | 1216 | ||
1217 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
1218 | .clk = { | ||
1219 | .name = "sclk_mmc", | ||
1220 | .devname = "s3c-sdhci.0", | ||
1221 | .parent = &clk_dout_mmc0.clk, | ||
1222 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1223 | .ctrlbit = (1 << 0), | ||
1224 | }, | ||
1225 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 }, | ||
1226 | }; | ||
1227 | |||
1228 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
1229 | .clk = { | ||
1230 | .name = "sclk_mmc", | ||
1231 | .devname = "s3c-sdhci.1", | ||
1232 | .parent = &clk_dout_mmc1.clk, | ||
1233 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1234 | .ctrlbit = (1 << 4), | ||
1235 | }, | ||
1236 | .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 }, | ||
1237 | }; | ||
1238 | |||
1239 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
1240 | .clk = { | ||
1241 | .name = "sclk_mmc", | ||
1242 | .devname = "s3c-sdhci.2", | ||
1243 | .parent = &clk_dout_mmc2.clk, | ||
1244 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1245 | .ctrlbit = (1 << 8), | ||
1246 | }, | ||
1247 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 }, | ||
1248 | }; | ||
1249 | |||
1250 | static struct clksrc_clk clk_sclk_mmc3 = { | ||
1251 | .clk = { | ||
1252 | .name = "sclk_mmc", | ||
1253 | .devname = "s3c-sdhci.3", | ||
1254 | .parent = &clk_dout_mmc3.clk, | ||
1255 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
1256 | .ctrlbit = (1 << 12), | ||
1257 | }, | ||
1258 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, | ||
1259 | }; | ||
1260 | |||
1253 | /* Clock initialization code */ | 1261 | /* Clock initialization code */ |
1254 | static struct clksrc_clk *sysclks[] = { | 1262 | static struct clksrc_clk *sysclks[] = { |
1255 | &clk_mout_apll, | 1263 | &clk_mout_apll, |
@@ -1294,6 +1302,10 @@ static struct clksrc_clk *clksrc_cdev[] = { | |||
1294 | &clk_sclk_uart1, | 1302 | &clk_sclk_uart1, |
1295 | &clk_sclk_uart2, | 1303 | &clk_sclk_uart2, |
1296 | &clk_sclk_uart3, | 1304 | &clk_sclk_uart3, |
1305 | &clk_sclk_mmc0, | ||
1306 | &clk_sclk_mmc1, | ||
1307 | &clk_sclk_mmc2, | ||
1308 | &clk_sclk_mmc3, | ||
1297 | }; | 1309 | }; |
1298 | 1310 | ||
1299 | static struct clk_lookup exynos4_clk_lookup[] = { | 1311 | static struct clk_lookup exynos4_clk_lookup[] = { |
@@ -1301,6 +1313,10 @@ static struct clk_lookup exynos4_clk_lookup[] = { | |||
1301 | CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &clk_sclk_uart1.clk), | 1313 | CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &clk_sclk_uart1.clk), |
1302 | CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &clk_sclk_uart2.clk), | 1314 | CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &clk_sclk_uart2.clk), |
1303 | CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &clk_sclk_uart3.clk), | 1315 | CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &clk_sclk_uart3.clk), |
1316 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
1317 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
1318 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
1319 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), | ||
1304 | CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), | 1320 | CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), |
1305 | CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), | 1321 | CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), |
1306 | }; | 1322 | }; |
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 635fb97e31ab..b895ec031105 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -249,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) | |||
249 | 249 | ||
250 | static int nuri_bl_init(struct device *dev) | 250 | static int nuri_bl_init(struct device *dev) |
251 | { | 251 | { |
252 | int ret, gpio = EXYNOS4_GPE2(3); | 252 | return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW, |
253 | 253 | "LCD_LD0_EN"); | |
254 | ret = gpio_request(gpio, "LCD_LDO_EN"); | ||
255 | if (!ret) | ||
256 | gpio_direction_output(gpio, 0); | ||
257 | |||
258 | return ret; | ||
259 | } | 254 | } |
260 | 255 | ||
261 | static int nuri_bl_notify(struct device *dev, int brightness) | 256 | static int nuri_bl_notify(struct device *dev, int brightness) |
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index 5b365613b470..a27b23eee9fa 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -131,9 +131,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, | |||
131 | gpio_free(EXYNOS4_GPD0(1)); | 131 | gpio_free(EXYNOS4_GPD0(1)); |
132 | #endif | 132 | #endif |
133 | /* fire nRESET on power up */ | 133 | /* fire nRESET on power up */ |
134 | gpio_request(EXYNOS4_GPX0(6), "GPX0"); | 134 | gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0"); |
135 | |||
136 | gpio_direction_output(EXYNOS4_GPX0(6), 1); | ||
137 | mdelay(100); | 135 | mdelay(100); |
138 | 136 | ||
139 | gpio_set_value(EXYNOS4_GPX0(6), 0); | 137 | gpio_set_value(EXYNOS4_GPX0(6), 0); |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 52aea972746a..37ac93e8d6d9 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -610,8 +610,7 @@ static void __init universal_tsp_init(void) | |||
610 | 610 | ||
611 | /* TSP_LDO_ON: XMDMADDR_11 */ | 611 | /* TSP_LDO_ON: XMDMADDR_11 */ |
612 | gpio = EXYNOS4_GPE2(3); | 612 | gpio = EXYNOS4_GPE2(3); |
613 | gpio_request(gpio, "TSP_LDO_ON"); | 613 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); |
614 | gpio_direction_output(gpio, 1); | ||
615 | gpio_export(gpio, 0); | 614 | gpio_export(gpio, 0); |
616 | 615 | ||
617 | /* TSP_INT: XMDMADDR_7 */ | 616 | /* TSP_INT: XMDMADDR_7 */ |
@@ -671,8 +670,7 @@ static void __init universal_touchkey_init(void) | |||
671 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); | 670 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); |
672 | 671 | ||
673 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ | 672 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ |
674 | gpio_request(gpio, "3_TOUCH_EN"); | 673 | gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN"); |
675 | gpio_direction_output(gpio, 1); | ||
676 | } | 674 | } |
677 | 675 | ||
678 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { | 676 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { |
@@ -1002,9 +1000,7 @@ static void __init universal_map_io(void) | |||
1002 | void s5p_tv_setup(void) | 1000 | void s5p_tv_setup(void) |
1003 | { | 1001 | { |
1004 | /* direct HPD to HDMI chip */ | 1002 | /* direct HPD to HDMI chip */ |
1005 | gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); | 1003 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); |
1006 | |||
1007 | gpio_direction_input(EXYNOS4_GPX3(7)); | ||
1008 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | 1004 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); |
1009 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | 1005 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); |
1010 | 1006 | ||
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index c4f792dcad19..a4f61a43c7ba 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/hardware/cache-l2x0.h> | 25 | #include <asm/hardware/cache-l2x0.h> |
26 | #include <asm/smp_scu.h> | ||
26 | 27 | ||
27 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
28 | #include <plat/pm.h> | 29 | #include <plat/pm.h> |
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct device *dev) | |||
213 | return 0; | 214 | return 0; |
214 | } | 215 | } |
215 | 216 | ||
216 | /* This function copy from linux/arch/arm/kernel/smp_scu.c */ | ||
217 | |||
218 | void exynos4_scu_enable(void __iomem *scu_base) | ||
219 | { | ||
220 | u32 scu_ctrl; | ||
221 | |||
222 | scu_ctrl = __raw_readl(scu_base); | ||
223 | /* already enabled? */ | ||
224 | if (scu_ctrl & 1) | ||
225 | return; | ||
226 | |||
227 | scu_ctrl |= 1; | ||
228 | __raw_writel(scu_ctrl, scu_base); | ||
229 | |||
230 | /* | ||
231 | * Ensure that the data accessed by CPU0 before the SCU was | ||
232 | * initialised is visible to the other CPUs. | ||
233 | */ | ||
234 | flush_cache_all(); | ||
235 | } | ||
236 | |||
237 | static unsigned long pll_base_rate; | 217 | static unsigned long pll_base_rate; |
238 | 218 | ||
239 | static void exynos4_restore_pll(void) | 219 | static void exynos4_restore_pll(void) |
@@ -404,7 +384,7 @@ static void exynos4_pm_resume(void) | |||
404 | 384 | ||
405 | exynos4_restore_pll(); | 385 | exynos4_restore_pll(); |
406 | 386 | ||
407 | exynos4_scu_enable(S5P_VA_SCU); | 387 | scu_enable(S5P_VA_SCU); |
408 | 388 | ||
409 | #ifdef CONFIG_CACHE_L2X0 | 389 | #ifdef CONFIG_CACHE_L2X0 |
410 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); | 390 | s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); |
diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c deleted file mode 100644 index 92937b410906..000000000000 --- a/arch/arm/mach-exynos/setup-sdhci.c +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | |||
15 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
16 | |||
17 | char *exynos4_hsmmc_clksrcs[4] = { | ||
18 | [0] = NULL, | ||
19 | [1] = NULL, | ||
20 | [2] = "sclk_mmc", /* mmc_bus */ | ||
21 | [3] = NULL, | ||
22 | }; | ||