Merge branch 'next/cleanup-plat-s3c24xx' into next/cleanup-plat-s3c24xx-s5p

14 files changed, 82 insertions, 88 deletions

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 801c738d8f0e..2c35fd404cae 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -370,6 +370,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
 
 config MACH_EXYNOS4_DT
         bool "Samsung Exynos4 Machine using device tree"
+        depends on ARCH_EXYNOS4
         select CPU_EXYNOS4210
         select USE_OF
         select ARM_AMBA
@@ -382,6 +383,7 @@ config MACH_EXYNOS4_DT
 
 config MACH_EXYNOS5_DT
         bool "SAMSUNG EXYNOS5 Machine using device tree"
+        depends on ARCH_EXYNOS5
         select SOC_EXYNOS5250
         select USE_OF
         select ARM_AMBA
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 428731197471..bcb7db453145 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -502,25 +502,25 @@ static struct clk exynos4_init_clocks_off[] = {
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.0",
+                .devname        = "exynos4-sdhci.0",
                 .parent         = &exynos4_clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
+                .devname        = "exynos4-sdhci.1",
                 .parent         = &exynos4_clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.2",
+                .devname        = "exynos4-sdhci.2",
                 .parent         = &exynos4_clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.3",
+                .devname        = "exynos4-sdhci.3",
                 .parent         = &exynos4_clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 8),
@@ -1201,7 +1201,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = {
 static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.0",
+                .devname        = "exynos4-sdhci.0",
                 .parent         = &exynos4_clk_dout_mmc0.clk,
                 .enable         = exynos4_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 0),
@@ -1212,7 +1212,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
 static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.1",
+                .devname        = "exynos4-sdhci.1",
                 .parent         = &exynos4_clk_dout_mmc1.clk,
                 .enable         = exynos4_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 4),
@@ -1223,7 +1223,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
 static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.2",
+                .devname        = "exynos4-sdhci.2",
                 .parent         = &exynos4_clk_dout_mmc2.clk,
                 .enable         = exynos4_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 8),
@@ -1234,7 +1234,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
 static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.3",
+                .devname        = "exynos4-sdhci.3",
                 .parent         = &exynos4_clk_dout_mmc3.clk,
                 .enable         = exynos4_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 12),
@@ -1339,10 +1339,10 @@ static struct clk_lookup exynos4_clk_lookup[] = {
         CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk),
         CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk),
         CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk),
-        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
-        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
-        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
-        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
+        CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
+        CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
+        CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
+        CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
         CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
         CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
         CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 3320ad140ebe..ad3bec4f1fa6 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -475,25 +475,25 @@ static struct clk exynos5_init_clocks_off[] = {
                 .ctrlbit        = (1 << 20),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.0",
+                .devname        = "exynos4-sdhci.0",
                 .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
+                .devname        = "exynos4-sdhci.1",
                 .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 13),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.2",
+                .devname        = "exynos4-sdhci.2",
                 .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 14),
         }, {
                 .name           = "hsmmc",
-                .devname        = "s3c-sdhci.3",
+                .devname        = "exynos4-sdhci.3",
                 .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 15),
@@ -903,7 +903,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
 static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.0",
+                .devname        = "exynos4-sdhci.0",
                 .parent         = &exynos5_clk_dout_mmc0.clk,
                 .enable         = exynos5_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 0),
@@ -914,7 +914,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
 static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.1",
+                .devname        = "exynos4-sdhci.1",
                 .parent         = &exynos5_clk_dout_mmc1.clk,
                 .enable         = exynos5_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 4),
@@ -925,7 +925,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
 static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.2",
+                .devname        = "exynos4-sdhci.2",
                 .parent         = &exynos5_clk_dout_mmc2.clk,
                 .enable         = exynos5_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 8),
@@ -936,7 +936,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
 static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
         .clk    = {
                 .name           = "sclk_mmc",
-                .devname        = "s3c-sdhci.3",
+                .devname        = "exynos4-sdhci.3",
                 .parent         = &exynos5_clk_dout_mmc3.clk,
                 .enable         = exynos5_clksrc_mask_fsys_ctrl,
                 .ctrlbit        = (1 << 12),
@@ -1080,10 +1080,10 @@ static struct clk_lookup exynos5_clk_lookup[] = {
         CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
         CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
         CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
-        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
-        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
-        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
-        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
+        CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
+        CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
+        CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
+        CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
         CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
         CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
         CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e6cc50e94a58..5ccd6e80a607 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void)
         s3c_fimc_setname(2, "exynos4-fimc");
         s3c_fimc_setname(3, "exynos4-fimc");
 
+        s3c_sdhci_setname(0, "exynos4-sdhci");
+        s3c_sdhci_setname(1, "exynos4-sdhci");
+        s3c_sdhci_setname(2, "exynos4-sdhci");
+        s3c_sdhci_setname(3, "exynos4-sdhci");
+
         /* The I2C bus controllers are directly compatible with s3c2440 */
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void)
         s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
         s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
 
+        s3c_sdhci_setname(0, "exynos4-sdhci");
+        s3c_sdhci_setname(1, "exynos4-sdhci");
+        s3c_sdhci_setname(2, "exynos4-sdhci");
+        s3c_sdhci_setname(3, "exynos4-sdhci");
+
         /* The I2C bus controllers are directly compatible with s3c2440 */
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void)
 {
         int irq;
 
-        gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+#ifdef CONFIG_OF
+        of_irq_init(exynos4_dt_irq_match);
+#endif
 
         for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
                 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
@@ -583,10 +595,11 @@ core_initcall(exynos_core_init);
 #ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
+        int ret;
+
         if (soc_is_exynos5250())
                 return 0;
 
-        int ret;
         ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
         if (!ret) {
                 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c
index b025db4bf602..79035018fb74 100644
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ b/arch/arm/mach-exynos/dev-dwmci.c
@@ -16,6 +16,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
+#include <linux/ioport.h>
 #include <linux/mmc/dw_mmc.h>
 
 #include <plat/devs.h>
@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
 }
 
 static struct resource exynos4_dwmci_resource[] = {
-        [0] = {
-                .start  = EXYNOS4_PA_DWMCI,
-                .end    = EXYNOS4_PA_DWMCI + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_DWMCI,
-                .end    = IRQ_DWMCI,
-                .flags  = IORESOURCE_IRQ,
-        }
+        [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
+        [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
 };
 
 static struct dw_mci_board exynos4_dwci_pdata = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 3983abee4264..69aaa4503205 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -35,8 +35,6 @@
 #include <mach/irqs.h>
 #include <mach/dma.h>
 
-static u64 dma_dmamask = DMA_BIT_MASK(32);
-
 static u8 exynos4210_pdma0_peri[] = {
         DMACH_PCM0_RX,
         DMACH_PCM0_TX,
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S
index 6c857ff0b5d8..e0c86ea475e7 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos/include/mach/debug-macro.S
@@ -21,10 +21,9 @@
          */
 
         .macro addruart, rp, rv, tmp
-                mov     \rp, #0x10000000
-                ldr     \rp, [\rp, #0x0]
-                and     \rp, \rp, #0xf00000
-                teq     \rp, #0x500000          @@ EXYNOS5
+                mrc     p15, 0, \tmp, c0, c0, 0
+                and     \tmp, \tmp, #0xf0
+                teq     \tmp, #0xf0             @@ A15
                 ldreq   \rp, =EXYNOS5_PA_UART
                 movne   \rp, #EXYNOS4_PA_UART   @@ EXYNOS4
                 ldr     \rv, =S3C_VA_UART
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index f140e1a2d335..116167524051 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -219,6 +219,8 @@
 #define IRQ_MFC                         EXYNOS4_IRQ_MFC
 #define IRQ_SDO                         EXYNOS4_IRQ_SDO
 
+#define IRQ_I2S0                        EXYNOS4_IRQ_I2S0
+
 #define IRQ_ADC                         EXYNOS4_IRQ_ADC0
 #define IRQ_TC                          EXYNOS4_IRQ_PEN0
 
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 69f2ea6fb0d2..0e2292d04550 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,10 @@
 #define EXYNOS4_PA_MDMA1                0x12840000
 #define EXYNOS4_PA_PDMA0                0x12680000
 #define EXYNOS4_PA_PDMA1                0x12690000
+#define EXYNOS5_PA_MDMA0                0x10800000
+#define EXYNOS5_PA_MDMA1                0x11C10000
+#define EXYNOS5_PA_PDMA0                0x121A0000
+#define EXYNOS5_PA_PDMA1                0x121B0000
 
 #define EXYNOS4_PA_SYSMMU_MDMA          0x10A40000
 #define EXYNOS4_PA_SYSMMU_2D_ACP        0x10A40000
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 7395236ffc0e..dba83e91f0fd 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -258,9 +258,15 @@
 
 /* For EXYNOS5250 */
 
+#define EXYNOS5_APLL_LOCK                       EXYNOS_CLKREG(0x00000)
 #define EXYNOS5_APLL_CON0                       EXYNOS_CLKREG(0x00100)
 #define EXYNOS5_CLKSRC_CPU                      EXYNOS_CLKREG(0x00200)
+#define EXYNOS5_CLKMUX_STATCPU                  EXYNOS_CLKREG(0x00400)
 #define EXYNOS5_CLKDIV_CPU0                     EXYNOS_CLKREG(0x00500)
+#define EXYNOS5_CLKDIV_CPU1                     EXYNOS_CLKREG(0x00504)
+#define EXYNOS5_CLKDIV_STATCPU0                 EXYNOS_CLKREG(0x00600)
+#define EXYNOS5_CLKDIV_STATCPU1                 EXYNOS_CLKREG(0x00604)
+
 #define EXYNOS5_MPLL_CON0                       EXYNOS_CLKREG(0x04100)
 #define EXYNOS5_CLKSRC_CORE1                    EXYNOS_CLKREG(0x04204)
 
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 493f4f365ddf..2979995d5a6a 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -20,9 +20,24 @@ volatile u8 *uart_base;
 
 #include <plat/uncompress.h>
 
+static unsigned int __raw_readl(unsigned int ptr)
+{
+        return *((volatile unsigned int *)ptr);
+}
+
 static void arch_detect_cpu(void)
 {
-        if (machine_is_smdk5250())
+        u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
+
+        /*
+         * product_id is bits 31:12
+         *    bits 23:20 describe the exynosX family
+         *
+         */
+        chip_id >>= 20;
+        chip_id &= 0xf;
+
+        if (chip_id == 0x5)
                 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
         else
                 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0d26f50081ad..4711c8920e37 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos4210-uart.3", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
-        OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
         {},
 };
 
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index b3982c867c9c..ed90aef404c3 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
                                 MMC_CAP_ERASE),
+        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 };
@@ -307,49 +308,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
 };
 
 /* TSP */
-static u8 mxt_init_vals[] = {
-        /* MXT_GEN_COMMAND(6) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        /* MXT_GEN_POWER(7) */
-        0x20, 0xff, 0x32,
-        /* MXT_GEN_ACQUIRE(8) */
-        0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
-        /* MXT_TOUCH_MULTI(9) */
-        0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
-        0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00,
-        /* MXT_TOUCH_KEYARRAY(15) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-        0x00,
-        /* MXT_SPT_GPIOPWM(19) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        /* MXT_PROCI_GRIPFACE(20) */
-        0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
-        0x0f, 0x0a,
-        /* MXT_PROCG_NOISE(22) */
-        0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
-        0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
-        /* MXT_TOUCH_PROXIMITY(23) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00,
-        /* MXT_PROCI_ONETOUCH(24) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        /* MXT_SPT_SELFTEST(25) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00,
-        /* MXT_PROCI_TWOTOUCH(27) */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        /* MXT_SPT_CTECONFIG(28) */
-        0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
-};
-
 static struct mxt_platform_data mxt_platform_data = {
-        .config                 = mxt_init_vals,
-        .config_length          = ARRAY_SIZE(mxt_init_vals),
-
         .x_line                 = 18,
         .y_line                 = 11,
         .x_size                 = 1024,
@@ -571,7 +530,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
 
 static struct regulator_init_data __initdata max8997_ldo8_data = {
         .constraints    = {
-                .name           = "VUSB/VDAC_3.3V_C210",
+                .name           = "VUSB+VDAC_3.3V_C210",
                 .min_uV         = 3300000,
                 .max_uV         = 3300000,
                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
@@ -1347,6 +1306,7 @@ static struct platform_device *nuri_devices[] __initdata = {
 
 static void __init nuri_map_io(void)
 {
+        clk_xusbxti.rate = 24000000;
         exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
@@ -1379,7 +1339,6 @@ static void __init nuri_machine_init(void)
         nuri_camera_init();
 
         nuri_ehci_init();
-        clk_xusbxti.rate = 24000000;
 
         /* Last */
         platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 6bb9dbdd73fd..cb2b027f09a6 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,6 +29,7 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
+#include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/iic.h>
@@ -746,6 +747,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
         .max_width              = 8,
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 };
@@ -1057,6 +1059,7 @@ static struct platform_device *universal_devices[] __initdata = {
 
 static void __init universal_map_io(void)
 {
+        clk_xusbxti.rate = 24000000;
         exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));