diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2011-09-10 16:58:42 -0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-09-10 16:58:42 -0400 |
| commit | 72787aa866bfa6bcbd259e7a39b2f9a2f412794e (patch) | |
| tree | 1769d854a26f444875f7cdfd9982fe494a4cff71 /arch/arm/mach-exynos4/include | |
| parent | ad9f6677575e80ce23cb491d5ffb7b536772552e (diff) | |
| parent | 0a072a247fa79979dd31813decb6b118d7d511fd (diff) | |
Merge branches 'tegra/board' and 'at91/board' into next/board
Diffstat (limited to 'arch/arm/mach-exynos4/include')
| -rw-r--r-- | arch/arm/mach-exynos4/include/mach/irqs.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-exynos4/include/mach/regs-pmu.h | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h index 934d2a493982..f8952f8f3757 100644 --- a/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/arch/arm/mach-exynos4/include/mach/irqs.h | |||
| @@ -80,9 +80,8 @@ | |||
| 80 | #define IRQ_HSMMC3 IRQ_SPI(76) | 80 | #define IRQ_HSMMC3 IRQ_SPI(76) |
| 81 | #define IRQ_DWMCI IRQ_SPI(77) | 81 | #define IRQ_DWMCI IRQ_SPI(77) |
| 82 | 82 | ||
| 83 | #define IRQ_MIPICSI0 IRQ_SPI(78) | 83 | #define IRQ_MIPI_CSIS0 IRQ_SPI(78) |
| 84 | 84 | #define IRQ_MIPI_CSIS1 IRQ_SPI(80) | |
| 85 | #define IRQ_MIPICSI1 IRQ_SPI(80) | ||
| 86 | 85 | ||
| 87 | #define IRQ_ONENAND_AUDI IRQ_SPI(82) | 86 | #define IRQ_ONENAND_AUDI IRQ_SPI(82) |
| 88 | #define IRQ_ROTATOR IRQ_SPI(83) | 87 | #define IRQ_ROTATOR IRQ_SPI(83) |
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h index fa49bbb8e7b0..cdf9b47c303c 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h | |||
| @@ -29,6 +29,8 @@ | |||
| 29 | #define S5P_USE_STANDBY_WFE1 (1 << 25) | 29 | #define S5P_USE_STANDBY_WFE1 (1 << 25) |
| 30 | #define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24)) | 30 | #define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24)) |
| 31 | 31 | ||
| 32 | #define S5P_SWRESET S5P_PMUREG(0x0400) | ||
| 33 | |||
| 32 | #define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) | 34 | #define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) |
| 33 | #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) | 35 | #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) |
| 34 | #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) | 36 | #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) |