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authorTomasz Figa <t.figa@samsung.com>2014-03-17 18:28:30 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-03-20 15:09:29 -0400
commitdd8ac696b20c1be5ca4728045df10e882e01e91d (patch)
treea7b4926f10ad997f4bd1d833f1d38b8405cfea18 /arch/arm/mach-exynos/pm.c
parentd710aa31874e2ff6e656dbd4807f4bd8d659eb93 (diff)
ARM: EXYNOS: Allow wake-up using GIC interrupts
This patch restores the ability to receive wake-up events from internal GIC interrupts, e.g. RTC tick or alarm interrupts. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index ada1c8374b77..15af0ceb0a66 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -17,6 +17,7 @@
17#include <linux/suspend.h> 17#include <linux/suspend.h>
18#include <linux/syscore_ops.h> 18#include <linux/syscore_ops.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irqchip/arm-gic.h>
20#include <linux/err.h> 21#include <linux/err.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22 23
@@ -35,6 +36,16 @@
35#include "common.h" 36#include "common.h"
36#include "regs-pmu.h" 37#include "regs-pmu.h"
37 38
39/**
40 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
41 * @hwirq: Hardware IRQ signal of the GIC
42 * @mask: Mask in PMU wake-up mask register
43 */
44struct exynos_wkup_irq {
45 unsigned int hwirq;
46 u32 mask;
47};
48
38static struct sleep_save exynos5_sys_save[] = { 49static struct sleep_save exynos5_sys_save[] = {
39 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), 50 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
40}; 51};
@@ -48,8 +59,47 @@ static struct sleep_save exynos_core_save[] = {
48 SAVE_ITEM(S5P_SROM_BC3), 59 SAVE_ITEM(S5P_SROM_BC3),
49}; 60};
50 61
62/*
63 * GIC wake-up support
64 */
65
51static u32 exynos_irqwake_intmask = 0xffffffff; 66static u32 exynos_irqwake_intmask = 0xffffffff;
52 67
68static const struct exynos_wkup_irq exynos4_wkup_irq[] = {
69 { 76, BIT(1) }, /* RTC alarm */
70 { 77, BIT(2) }, /* RTC tick */
71 { /* sentinel */ },
72};
73
74static const struct exynos_wkup_irq exynos5250_wkup_irq[] = {
75 { 75, BIT(1) }, /* RTC alarm */
76 { 76, BIT(2) }, /* RTC tick */
77 { /* sentinel */ },
78};
79
80static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
81{
82 const struct exynos_wkup_irq *wkup_irq;
83
84 if (soc_is_exynos5250())
85 wkup_irq = exynos5250_wkup_irq;
86 else
87 wkup_irq = exynos4_wkup_irq;
88
89 while (wkup_irq->mask) {
90 if (wkup_irq->hwirq == data->hwirq) {
91 if (!state)
92 exynos_irqwake_intmask |= wkup_irq->mask;
93 else
94 exynos_irqwake_intmask &= ~wkup_irq->mask;
95 return 0;
96 }
97 ++wkup_irq;
98 }
99
100 return -ENOENT;
101}
102
53/* For Cortex-A9 Diagnostic and Power control register */ 103/* For Cortex-A9 Diagnostic and Power control register */
54static unsigned int save_arm_register[2]; 104static unsigned int save_arm_register[2];
55 105
@@ -258,6 +308,9 @@ void __init exynos_pm_init(void)
258{ 308{
259 u32 tmp; 309 u32 tmp;
260 310
311 /* Platform-specific GIC callback */
312 gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
313
261 /* All wakeup disable */ 314 /* All wakeup disable */
262 tmp = __raw_readl(S5P_WAKEUP_MASK); 315 tmp = __raw_readl(S5P_WAKEUP_MASK);
263 tmp |= ((0xFF << 8) | (0x1F << 1)); 316 tmp |= ((0xFF << 8) | (0x1F << 1));