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authorDaniel Lezcano <daniel.lezcano@linaro.org>2014-05-08 17:53:00 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-05-25 16:21:08 -0400
commit3681bafeb1e4781bdeaecd19aa8c9f6d0db90f6f (patch)
tree968fb9e4e1a5493f8f843f25f04a6d87665ddd6e /arch/arm/mach-exynos/pm.c
parent712bb69e89c575b793954eb641958f992f4b5f78 (diff)
ARM: EXYNOS: Move the AFTR state function into pm.c
In order to remove depedency on pm code, let's move the 'exynos_enter_aftr' function into the pm.c file as well as the other helper functions. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 24c638d2afd4..179f7e09e20d 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -167,6 +167,35 @@ int exynos_cluster_power_state(int cluster)
167 S5P_CORE_LOCAL_PWR_EN); 167 S5P_CORE_LOCAL_PWR_EN);
168} 168}
169 169
170#define EXYNOS_BOOT_VECTOR_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
171 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
172 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
173#define EXYNOS_BOOT_VECTOR_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
174 S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
175 (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
176
177#define S5P_CHECK_AFTR 0xFCBA0D10
178
179/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
180static void exynos_set_wakeupmask(long mask)
181{
182 __raw_writel(mask, S5P_WAKEUP_MASK);
183}
184
185static void exynos_cpu_set_boot_vector(long flags)
186{
187 __raw_writel(virt_to_phys(exynos_cpu_resume), EXYNOS_BOOT_VECTOR_ADDR);
188 __raw_writel(flags, EXYNOS_BOOT_VECTOR_FLAG);
189}
190
191void exynos_enter_aftr(void)
192{
193 exynos_set_wakeupmask(0x0000ff3e);
194 exynos_cpu_set_boot_vector(S5P_CHECK_AFTR);
195 /* Set value of power down register for aftr mode */
196 exynos_sys_powerdown_conf(SYS_AFTR);
197}
198
170/* For Cortex-A9 Diagnostic and Power control register */ 199/* For Cortex-A9 Diagnostic and Power control register */
171static unsigned int save_arm_register[2]; 200static unsigned int save_arm_register[2];
172 201