diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 00:54:56 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 00:54:56 -0400 |
commit | 830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch) | |
tree | e72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos/mach-universal_c210.c | |
parent | e700e41d9abfbf9fee01e979a41b185695132c19 (diff) |
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.
This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/mach-universal_c210.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-universal_c210.c | 1064 |
1 files changed, 1064 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c new file mode 100644 index 000000000000..a2a177ff4b44 --- /dev/null +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -0,0 +1,1064 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/mach-universal_c210.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #include <linux/platform_device.h> | ||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/input.h> | ||
13 | #include <linux/i2c.h> | ||
14 | #include <linux/gpio_keys.h> | ||
15 | #include <linux/gpio.h> | ||
16 | #include <linux/fb.h> | ||
17 | #include <linux/mfd/max8998.h> | ||
18 | #include <linux/regulator/machine.h> | ||
19 | #include <linux/regulator/fixed.h> | ||
20 | #include <linux/regulator/max8952.h> | ||
21 | #include <linux/mmc/host.h> | ||
22 | #include <linux/i2c-gpio.h> | ||
23 | #include <linux/i2c/mcs.h> | ||
24 | #include <linux/i2c/atmel_mxt_ts.h> | ||
25 | |||
26 | #include <asm/mach/arch.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | |||
29 | #include <plat/regs-serial.h> | ||
30 | #include <plat/exynos4.h> | ||
31 | #include <plat/cpu.h> | ||
32 | #include <plat/devs.h> | ||
33 | #include <plat/iic.h> | ||
34 | #include <plat/gpio-cfg.h> | ||
35 | #include <plat/fb.h> | ||
36 | #include <plat/mfc.h> | ||
37 | #include <plat/sdhci.h> | ||
38 | #include <plat/pd.h> | ||
39 | #include <plat/regs-fb-v4.h> | ||
40 | #include <plat/fimc-core.h> | ||
41 | #include <plat/camport.h> | ||
42 | #include <plat/mipi_csis.h> | ||
43 | |||
44 | #include <mach/map.h> | ||
45 | |||
46 | #include <media/v4l2-mediabus.h> | ||
47 | #include <media/s5p_fimc.h> | ||
48 | #include <media/m5mols.h> | ||
49 | |||
50 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
51 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
52 | S3C2410_UCON_RXILEVEL | \ | ||
53 | S3C2410_UCON_TXIRQMODE | \ | ||
54 | S3C2410_UCON_RXIRQMODE | \ | ||
55 | S3C2410_UCON_RXFIFO_TOI | \ | ||
56 | S3C2443_UCON_RXERR_IRQEN) | ||
57 | |||
58 | #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
59 | |||
60 | #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
61 | S5PV210_UFCON_TXTRIG256 | \ | ||
62 | S5PV210_UFCON_RXTRIG256) | ||
63 | |||
64 | static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = { | ||
65 | [0] = { | ||
66 | .hwport = 0, | ||
67 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
68 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
69 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .hwport = 1, | ||
73 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
74 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
75 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
76 | }, | ||
77 | [2] = { | ||
78 | .hwport = 2, | ||
79 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
80 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
81 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
82 | }, | ||
83 | [3] = { | ||
84 | .hwport = 3, | ||
85 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
86 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
87 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
88 | }, | ||
89 | }; | ||
90 | |||
91 | static struct regulator_consumer_supply max8952_consumer = | ||
92 | REGULATOR_SUPPLY("vdd_arm", NULL); | ||
93 | |||
94 | static struct max8952_platform_data universal_max8952_pdata __initdata = { | ||
95 | .gpio_vid0 = EXYNOS4_GPX0(3), | ||
96 | .gpio_vid1 = EXYNOS4_GPX0(4), | ||
97 | .gpio_en = -1, /* Not controllable, set "Always High" */ | ||
98 | .default_mode = 0, /* vid0 = 0, vid1 = 0 */ | ||
99 | .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */ | ||
100 | .sync_freq = 0, /* default: fastest */ | ||
101 | .ramp_speed = 0, /* default: fastest */ | ||
102 | |||
103 | .reg_data = { | ||
104 | .constraints = { | ||
105 | .name = "VARM_1.2V", | ||
106 | .min_uV = 770000, | ||
107 | .max_uV = 1400000, | ||
108 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
109 | .always_on = 1, | ||
110 | .boot_on = 1, | ||
111 | }, | ||
112 | .num_consumer_supplies = 1, | ||
113 | .consumer_supplies = &max8952_consumer, | ||
114 | }, | ||
115 | }; | ||
116 | |||
117 | static struct regulator_consumer_supply lp3974_buck1_consumer = | ||
118 | REGULATOR_SUPPLY("vdd_int", NULL); | ||
119 | |||
120 | static struct regulator_consumer_supply lp3974_buck2_consumer = | ||
121 | REGULATOR_SUPPLY("vddg3d", NULL); | ||
122 | |||
123 | static struct regulator_consumer_supply lp3974_buck3_consumer = | ||
124 | REGULATOR_SUPPLY("vdet", "s5p-sdo"); | ||
125 | |||
126 | static struct regulator_init_data lp3974_buck1_data = { | ||
127 | .constraints = { | ||
128 | .name = "VINT_1.1V", | ||
129 | .min_uV = 750000, | ||
130 | .max_uV = 1500000, | ||
131 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
132 | REGULATOR_CHANGE_STATUS, | ||
133 | .boot_on = 1, | ||
134 | .state_mem = { | ||
135 | .disabled = 1, | ||
136 | }, | ||
137 | }, | ||
138 | .num_consumer_supplies = 1, | ||
139 | .consumer_supplies = &lp3974_buck1_consumer, | ||
140 | }; | ||
141 | |||
142 | static struct regulator_init_data lp3974_buck2_data = { | ||
143 | .constraints = { | ||
144 | .name = "VG3D_1.1V", | ||
145 | .min_uV = 750000, | ||
146 | .max_uV = 1500000, | ||
147 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
148 | REGULATOR_CHANGE_STATUS, | ||
149 | .boot_on = 1, | ||
150 | .state_mem = { | ||
151 | .disabled = 1, | ||
152 | }, | ||
153 | }, | ||
154 | .num_consumer_supplies = 1, | ||
155 | .consumer_supplies = &lp3974_buck2_consumer, | ||
156 | }; | ||
157 | |||
158 | static struct regulator_init_data lp3974_buck3_data = { | ||
159 | .constraints = { | ||
160 | .name = "VCC_1.8V", | ||
161 | .min_uV = 1800000, | ||
162 | .max_uV = 1800000, | ||
163 | .apply_uV = 1, | ||
164 | .always_on = 1, | ||
165 | .state_mem = { | ||
166 | .enabled = 1, | ||
167 | }, | ||
168 | }, | ||
169 | .num_consumer_supplies = 1, | ||
170 | .consumer_supplies = &lp3974_buck3_consumer, | ||
171 | }; | ||
172 | |||
173 | static struct regulator_init_data lp3974_buck4_data = { | ||
174 | .constraints = { | ||
175 | .name = "VMEM_1.2V", | ||
176 | .min_uV = 1200000, | ||
177 | .max_uV = 1200000, | ||
178 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
179 | .apply_uV = 1, | ||
180 | .state_mem = { | ||
181 | .disabled = 1, | ||
182 | }, | ||
183 | }, | ||
184 | }; | ||
185 | |||
186 | static struct regulator_init_data lp3974_ldo2_data = { | ||
187 | .constraints = { | ||
188 | .name = "VALIVE_1.2V", | ||
189 | .min_uV = 1200000, | ||
190 | .max_uV = 1200000, | ||
191 | .apply_uV = 1, | ||
192 | .always_on = 1, | ||
193 | .state_mem = { | ||
194 | .enabled = 1, | ||
195 | }, | ||
196 | }, | ||
197 | }; | ||
198 | |||
199 | static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { | ||
200 | REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), | ||
201 | REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), | ||
202 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), | ||
203 | }; | ||
204 | |||
205 | static struct regulator_init_data lp3974_ldo3_data = { | ||
206 | .constraints = { | ||
207 | .name = "VUSB+MIPI_1.1V", | ||
208 | .min_uV = 1100000, | ||
209 | .max_uV = 1100000, | ||
210 | .apply_uV = 1, | ||
211 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
212 | .state_mem = { | ||
213 | .disabled = 1, | ||
214 | }, | ||
215 | }, | ||
216 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer), | ||
217 | .consumer_supplies = lp3974_ldo3_consumer, | ||
218 | }; | ||
219 | |||
220 | static struct regulator_consumer_supply lp3974_ldo4_consumer[] = { | ||
221 | REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), | ||
222 | }; | ||
223 | |||
224 | static struct regulator_init_data lp3974_ldo4_data = { | ||
225 | .constraints = { | ||
226 | .name = "VADC_3.3V", | ||
227 | .min_uV = 3300000, | ||
228 | .max_uV = 3300000, | ||
229 | .apply_uV = 1, | ||
230 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
231 | .state_mem = { | ||
232 | .disabled = 1, | ||
233 | }, | ||
234 | }, | ||
235 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer), | ||
236 | .consumer_supplies = lp3974_ldo4_consumer, | ||
237 | }; | ||
238 | |||
239 | static struct regulator_init_data lp3974_ldo5_data = { | ||
240 | .constraints = { | ||
241 | .name = "VTF_2.8V", | ||
242 | .min_uV = 2800000, | ||
243 | .max_uV = 2800000, | ||
244 | .apply_uV = 1, | ||
245 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
246 | .state_mem = { | ||
247 | .disabled = 1, | ||
248 | }, | ||
249 | }, | ||
250 | }; | ||
251 | |||
252 | static struct regulator_init_data lp3974_ldo6_data = { | ||
253 | .constraints = { | ||
254 | .name = "LDO6", | ||
255 | .min_uV = 2000000, | ||
256 | .max_uV = 2000000, | ||
257 | .apply_uV = 1, | ||
258 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
259 | .state_mem = { | ||
260 | .disabled = 1, | ||
261 | }, | ||
262 | }, | ||
263 | }; | ||
264 | |||
265 | static struct regulator_consumer_supply lp3974_ldo7_consumer[] = { | ||
266 | REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), | ||
267 | }; | ||
268 | |||
269 | static struct regulator_init_data lp3974_ldo7_data = { | ||
270 | .constraints = { | ||
271 | .name = "VLCD+VMIPI_1.8V", | ||
272 | .min_uV = 1800000, | ||
273 | .max_uV = 1800000, | ||
274 | .apply_uV = 1, | ||
275 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
276 | .state_mem = { | ||
277 | .disabled = 1, | ||
278 | }, | ||
279 | }, | ||
280 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer), | ||
281 | .consumer_supplies = lp3974_ldo7_consumer, | ||
282 | }; | ||
283 | |||
284 | static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { | ||
285 | REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), | ||
286 | }; | ||
287 | |||
288 | static struct regulator_init_data lp3974_ldo8_data = { | ||
289 | .constraints = { | ||
290 | .name = "VUSB+VDAC_3.3V", | ||
291 | .min_uV = 3300000, | ||
292 | .max_uV = 3300000, | ||
293 | .apply_uV = 1, | ||
294 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
295 | .state_mem = { | ||
296 | .disabled = 1, | ||
297 | }, | ||
298 | }, | ||
299 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer), | ||
300 | .consumer_supplies = lp3974_ldo8_consumer, | ||
301 | }; | ||
302 | |||
303 | static struct regulator_init_data lp3974_ldo9_data = { | ||
304 | .constraints = { | ||
305 | .name = "VCC_2.8V", | ||
306 | .min_uV = 2800000, | ||
307 | .max_uV = 2800000, | ||
308 | .apply_uV = 1, | ||
309 | .always_on = 1, | ||
310 | .state_mem = { | ||
311 | .enabled = 1, | ||
312 | }, | ||
313 | }, | ||
314 | }; | ||
315 | |||
316 | static struct regulator_init_data lp3974_ldo10_data = { | ||
317 | .constraints = { | ||
318 | .name = "VPLL_1.1V", | ||
319 | .min_uV = 1100000, | ||
320 | .max_uV = 1100000, | ||
321 | .boot_on = 1, | ||
322 | .apply_uV = 1, | ||
323 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
324 | .state_mem = { | ||
325 | .disabled = 1, | ||
326 | }, | ||
327 | }, | ||
328 | }; | ||
329 | |||
330 | static struct regulator_consumer_supply lp3974_ldo11_consumer = | ||
331 | REGULATOR_SUPPLY("dig_28", "0-001f"); | ||
332 | |||
333 | static struct regulator_init_data lp3974_ldo11_data = { | ||
334 | .constraints = { | ||
335 | .name = "CAM_AF_3.3V", | ||
336 | .min_uV = 3300000, | ||
337 | .max_uV = 3300000, | ||
338 | .apply_uV = 1, | ||
339 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
340 | .state_mem = { | ||
341 | .disabled = 1, | ||
342 | }, | ||
343 | }, | ||
344 | .num_consumer_supplies = 1, | ||
345 | .consumer_supplies = &lp3974_ldo11_consumer, | ||
346 | }; | ||
347 | |||
348 | static struct regulator_init_data lp3974_ldo12_data = { | ||
349 | .constraints = { | ||
350 | .name = "PS_2.8V", | ||
351 | .min_uV = 2800000, | ||
352 | .max_uV = 2800000, | ||
353 | .apply_uV = 1, | ||
354 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
355 | .state_mem = { | ||
356 | .disabled = 1, | ||
357 | }, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | static struct regulator_init_data lp3974_ldo13_data = { | ||
362 | .constraints = { | ||
363 | .name = "VHIC_1.2V", | ||
364 | .min_uV = 1200000, | ||
365 | .max_uV = 1200000, | ||
366 | .apply_uV = 1, | ||
367 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
368 | .state_mem = { | ||
369 | .disabled = 1, | ||
370 | }, | ||
371 | }, | ||
372 | }; | ||
373 | |||
374 | static struct regulator_consumer_supply lp3974_ldo14_consumer = | ||
375 | REGULATOR_SUPPLY("dig_18", "0-001f"); | ||
376 | |||
377 | static struct regulator_init_data lp3974_ldo14_data = { | ||
378 | .constraints = { | ||
379 | .name = "CAM_I_HOST_1.8V", | ||
380 | .min_uV = 1800000, | ||
381 | .max_uV = 1800000, | ||
382 | .apply_uV = 1, | ||
383 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
384 | .state_mem = { | ||
385 | .disabled = 1, | ||
386 | }, | ||
387 | }, | ||
388 | .num_consumer_supplies = 1, | ||
389 | .consumer_supplies = &lp3974_ldo14_consumer, | ||
390 | }; | ||
391 | |||
392 | |||
393 | static struct regulator_consumer_supply lp3974_ldo15_consumer = | ||
394 | REGULATOR_SUPPLY("dig_12", "0-001f"); | ||
395 | |||
396 | static struct regulator_init_data lp3974_ldo15_data = { | ||
397 | .constraints = { | ||
398 | .name = "CAM_S_DIG+FM33_CORE_1.2V", | ||
399 | .min_uV = 1200000, | ||
400 | .max_uV = 1200000, | ||
401 | .apply_uV = 1, | ||
402 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
403 | .state_mem = { | ||
404 | .disabled = 1, | ||
405 | }, | ||
406 | }, | ||
407 | .num_consumer_supplies = 1, | ||
408 | .consumer_supplies = &lp3974_ldo15_consumer, | ||
409 | }; | ||
410 | |||
411 | static struct regulator_consumer_supply lp3974_ldo16_consumer[] = { | ||
412 | REGULATOR_SUPPLY("a_sensor", "0-001f"), | ||
413 | }; | ||
414 | |||
415 | static struct regulator_init_data lp3974_ldo16_data = { | ||
416 | .constraints = { | ||
417 | .name = "CAM_S_ANA_2.8V", | ||
418 | .min_uV = 2800000, | ||
419 | .max_uV = 2800000, | ||
420 | .apply_uV = 1, | ||
421 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
422 | .state_mem = { | ||
423 | .disabled = 1, | ||
424 | }, | ||
425 | }, | ||
426 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer), | ||
427 | .consumer_supplies = lp3974_ldo16_consumer, | ||
428 | }; | ||
429 | |||
430 | static struct regulator_init_data lp3974_ldo17_data = { | ||
431 | .constraints = { | ||
432 | .name = "VCC_3.0V_LCD", | ||
433 | .min_uV = 3000000, | ||
434 | .max_uV = 3000000, | ||
435 | .apply_uV = 1, | ||
436 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
437 | .boot_on = 1, | ||
438 | .state_mem = { | ||
439 | .disabled = 1, | ||
440 | }, | ||
441 | }, | ||
442 | }; | ||
443 | |||
444 | static struct regulator_init_data lp3974_32khz_ap_data = { | ||
445 | .constraints = { | ||
446 | .name = "32KHz AP", | ||
447 | .always_on = 1, | ||
448 | .state_mem = { | ||
449 | .enabled = 1, | ||
450 | }, | ||
451 | }, | ||
452 | }; | ||
453 | |||
454 | static struct regulator_init_data lp3974_32khz_cp_data = { | ||
455 | .constraints = { | ||
456 | .name = "32KHz CP", | ||
457 | .state_mem = { | ||
458 | .disabled = 1, | ||
459 | }, | ||
460 | }, | ||
461 | }; | ||
462 | |||
463 | static struct regulator_init_data lp3974_vichg_data = { | ||
464 | .constraints = { | ||
465 | .name = "VICHG", | ||
466 | .state_mem = { | ||
467 | .disabled = 1, | ||
468 | }, | ||
469 | }, | ||
470 | }; | ||
471 | |||
472 | static struct regulator_init_data lp3974_esafeout1_data = { | ||
473 | .constraints = { | ||
474 | .name = "SAFEOUT1", | ||
475 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
476 | .state_mem = { | ||
477 | .enabled = 1, | ||
478 | }, | ||
479 | }, | ||
480 | }; | ||
481 | |||
482 | static struct regulator_init_data lp3974_esafeout2_data = { | ||
483 | .constraints = { | ||
484 | .name = "SAFEOUT2", | ||
485 | .boot_on = 1, | ||
486 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
487 | .state_mem = { | ||
488 | .enabled = 1, | ||
489 | }, | ||
490 | }, | ||
491 | }; | ||
492 | |||
493 | static struct max8998_regulator_data lp3974_regulators[] = { | ||
494 | { MAX8998_LDO2, &lp3974_ldo2_data }, | ||
495 | { MAX8998_LDO3, &lp3974_ldo3_data }, | ||
496 | { MAX8998_LDO4, &lp3974_ldo4_data }, | ||
497 | { MAX8998_LDO5, &lp3974_ldo5_data }, | ||
498 | { MAX8998_LDO6, &lp3974_ldo6_data }, | ||
499 | { MAX8998_LDO7, &lp3974_ldo7_data }, | ||
500 | { MAX8998_LDO8, &lp3974_ldo8_data }, | ||
501 | { MAX8998_LDO9, &lp3974_ldo9_data }, | ||
502 | { MAX8998_LDO10, &lp3974_ldo10_data }, | ||
503 | { MAX8998_LDO11, &lp3974_ldo11_data }, | ||
504 | { MAX8998_LDO12, &lp3974_ldo12_data }, | ||
505 | { MAX8998_LDO13, &lp3974_ldo13_data }, | ||
506 | { MAX8998_LDO14, &lp3974_ldo14_data }, | ||
507 | { MAX8998_LDO15, &lp3974_ldo15_data }, | ||
508 | { MAX8998_LDO16, &lp3974_ldo16_data }, | ||
509 | { MAX8998_LDO17, &lp3974_ldo17_data }, | ||
510 | { MAX8998_BUCK1, &lp3974_buck1_data }, | ||
511 | { MAX8998_BUCK2, &lp3974_buck2_data }, | ||
512 | { MAX8998_BUCK3, &lp3974_buck3_data }, | ||
513 | { MAX8998_BUCK4, &lp3974_buck4_data }, | ||
514 | { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data }, | ||
515 | { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data }, | ||
516 | { MAX8998_ENVICHG, &lp3974_vichg_data }, | ||
517 | { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data }, | ||
518 | { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data }, | ||
519 | }; | ||
520 | |||
521 | static struct max8998_platform_data universal_lp3974_pdata = { | ||
522 | .num_regulators = ARRAY_SIZE(lp3974_regulators), | ||
523 | .regulators = lp3974_regulators, | ||
524 | .buck1_voltage1 = 1100000, /* INT */ | ||
525 | .buck1_voltage2 = 1000000, | ||
526 | .buck1_voltage3 = 1100000, | ||
527 | .buck1_voltage4 = 1000000, | ||
528 | .buck1_set1 = EXYNOS4_GPX0(5), | ||
529 | .buck1_set2 = EXYNOS4_GPX0(6), | ||
530 | .buck2_voltage1 = 1200000, /* G3D */ | ||
531 | .buck2_voltage2 = 1100000, | ||
532 | .buck1_default_idx = 0, | ||
533 | .buck2_set3 = EXYNOS4_GPE2(0), | ||
534 | .buck2_default_idx = 0, | ||
535 | .wakeup = true, | ||
536 | }; | ||
537 | |||
538 | |||
539 | enum fixed_regulator_id { | ||
540 | FIXED_REG_ID_MMC0, | ||
541 | FIXED_REG_ID_HDMI_5V, | ||
542 | FIXED_REG_ID_CAM_S_IF, | ||
543 | FIXED_REG_ID_CAM_I_CORE, | ||
544 | FIXED_REG_ID_CAM_VT_DIO, | ||
545 | }; | ||
546 | |||
547 | static struct regulator_consumer_supply hdmi_fixed_consumer = | ||
548 | REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi"); | ||
549 | |||
550 | static struct regulator_init_data hdmi_fixed_voltage_init_data = { | ||
551 | .constraints = { | ||
552 | .name = "HDMI_5V", | ||
553 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
554 | }, | ||
555 | .num_consumer_supplies = 1, | ||
556 | .consumer_supplies = &hdmi_fixed_consumer, | ||
557 | }; | ||
558 | |||
559 | static struct fixed_voltage_config hdmi_fixed_voltage_config = { | ||
560 | .supply_name = "HDMI_EN1", | ||
561 | .microvolts = 5000000, | ||
562 | .gpio = EXYNOS4_GPE0(1), | ||
563 | .enable_high = true, | ||
564 | .init_data = &hdmi_fixed_voltage_init_data, | ||
565 | }; | ||
566 | |||
567 | static struct platform_device hdmi_fixed_voltage = { | ||
568 | .name = "reg-fixed-voltage", | ||
569 | .id = FIXED_REG_ID_HDMI_5V, | ||
570 | .dev = { | ||
571 | .platform_data = &hdmi_fixed_voltage_config, | ||
572 | }, | ||
573 | }; | ||
574 | |||
575 | /* GPIO I2C 5 (PMIC) */ | ||
576 | static struct i2c_board_info i2c5_devs[] __initdata = { | ||
577 | { | ||
578 | I2C_BOARD_INFO("max8952", 0xC0 >> 1), | ||
579 | .platform_data = &universal_max8952_pdata, | ||
580 | }, { | ||
581 | I2C_BOARD_INFO("lp3974", 0xCC >> 1), | ||
582 | .platform_data = &universal_lp3974_pdata, | ||
583 | }, | ||
584 | }; | ||
585 | |||
586 | /* I2C3 (TSP) */ | ||
587 | static struct mxt_platform_data qt602240_platform_data = { | ||
588 | .x_line = 19, | ||
589 | .y_line = 11, | ||
590 | .x_size = 800, | ||
591 | .y_size = 480, | ||
592 | .blen = 0x11, | ||
593 | .threshold = 0x28, | ||
594 | .voltage = 2800000, /* 2.8V */ | ||
595 | .orient = MXT_DIAGONAL, | ||
596 | }; | ||
597 | |||
598 | static struct i2c_board_info i2c3_devs[] __initdata = { | ||
599 | { | ||
600 | I2C_BOARD_INFO("qt602240_ts", 0x4a), | ||
601 | .platform_data = &qt602240_platform_data, | ||
602 | }, | ||
603 | }; | ||
604 | |||
605 | static void __init universal_tsp_init(void) | ||
606 | { | ||
607 | int gpio; | ||
608 | |||
609 | /* TSP_LDO_ON: XMDMADDR_11 */ | ||
610 | gpio = EXYNOS4_GPE2(3); | ||
611 | gpio_request(gpio, "TSP_LDO_ON"); | ||
612 | gpio_direction_output(gpio, 1); | ||
613 | gpio_export(gpio, 0); | ||
614 | |||
615 | /* TSP_INT: XMDMADDR_7 */ | ||
616 | gpio = EXYNOS4_GPE1(7); | ||
617 | gpio_request(gpio, "TSP_INT"); | ||
618 | |||
619 | s5p_register_gpio_interrupt(gpio); | ||
620 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); | ||
621 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); | ||
622 | i2c3_devs[0].irq = gpio_to_irq(gpio); | ||
623 | } | ||
624 | |||
625 | |||
626 | /* GPIO I2C 12 (3 Touchkey) */ | ||
627 | static uint32_t touchkey_keymap[] = { | ||
628 | /* MCS_KEY_MAP(value, keycode) */ | ||
629 | MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */ | ||
630 | MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */ | ||
631 | }; | ||
632 | |||
633 | static struct mcs_platform_data touchkey_data = { | ||
634 | .keymap = touchkey_keymap, | ||
635 | .keymap_size = ARRAY_SIZE(touchkey_keymap), | ||
636 | .key_maxval = 2, | ||
637 | }; | ||
638 | |||
639 | /* GPIO I2C 3_TOUCH 2.8V */ | ||
640 | #define I2C_GPIO_BUS_12 12 | ||
641 | static struct i2c_gpio_platform_data i2c_gpio12_data = { | ||
642 | .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */ | ||
643 | .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */ | ||
644 | }; | ||
645 | |||
646 | static struct platform_device i2c_gpio12 = { | ||
647 | .name = "i2c-gpio", | ||
648 | .id = I2C_GPIO_BUS_12, | ||
649 | .dev = { | ||
650 | .platform_data = &i2c_gpio12_data, | ||
651 | }, | ||
652 | }; | ||
653 | |||
654 | static struct i2c_board_info i2c_gpio12_devs[] __initdata = { | ||
655 | { | ||
656 | I2C_BOARD_INFO("mcs5080_touchkey", 0x20), | ||
657 | .platform_data = &touchkey_data, | ||
658 | }, | ||
659 | }; | ||
660 | |||
661 | static void __init universal_touchkey_init(void) | ||
662 | { | ||
663 | int gpio; | ||
664 | |||
665 | gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */ | ||
666 | gpio_request(gpio, "3_TOUCH_INT"); | ||
667 | s5p_register_gpio_interrupt(gpio); | ||
668 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); | ||
669 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); | ||
670 | |||
671 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ | ||
672 | gpio_request(gpio, "3_TOUCH_EN"); | ||
673 | gpio_direction_output(gpio, 1); | ||
674 | } | ||
675 | |||
676 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { | ||
677 | .frequency = 300 * 1000, | ||
678 | .sda_delay = 200, | ||
679 | }; | ||
680 | |||
681 | /* GPIO KEYS */ | ||
682 | static struct gpio_keys_button universal_gpio_keys_tables[] = { | ||
683 | { | ||
684 | .code = KEY_VOLUMEUP, | ||
685 | .gpio = EXYNOS4_GPX2(0), /* XEINT16 */ | ||
686 | .desc = "gpio-keys: KEY_VOLUMEUP", | ||
687 | .type = EV_KEY, | ||
688 | .active_low = 1, | ||
689 | .debounce_interval = 1, | ||
690 | }, { | ||
691 | .code = KEY_VOLUMEDOWN, | ||
692 | .gpio = EXYNOS4_GPX2(1), /* XEINT17 */ | ||
693 | .desc = "gpio-keys: KEY_VOLUMEDOWN", | ||
694 | .type = EV_KEY, | ||
695 | .active_low = 1, | ||
696 | .debounce_interval = 1, | ||
697 | }, { | ||
698 | .code = KEY_CONFIG, | ||
699 | .gpio = EXYNOS4_GPX2(2), /* XEINT18 */ | ||
700 | .desc = "gpio-keys: KEY_CONFIG", | ||
701 | .type = EV_KEY, | ||
702 | .active_low = 1, | ||
703 | .debounce_interval = 1, | ||
704 | }, { | ||
705 | .code = KEY_CAMERA, | ||
706 | .gpio = EXYNOS4_GPX2(3), /* XEINT19 */ | ||
707 | .desc = "gpio-keys: KEY_CAMERA", | ||
708 | .type = EV_KEY, | ||
709 | .active_low = 1, | ||
710 | .debounce_interval = 1, | ||
711 | }, { | ||
712 | .code = KEY_OK, | ||
713 | .gpio = EXYNOS4_GPX3(5), /* XEINT29 */ | ||
714 | .desc = "gpio-keys: KEY_OK", | ||
715 | .type = EV_KEY, | ||
716 | .active_low = 1, | ||
717 | .debounce_interval = 1, | ||
718 | }, | ||
719 | }; | ||
720 | |||
721 | static struct gpio_keys_platform_data universal_gpio_keys_data = { | ||
722 | .buttons = universal_gpio_keys_tables, | ||
723 | .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables), | ||
724 | }; | ||
725 | |||
726 | static struct platform_device universal_gpio_keys = { | ||
727 | .name = "gpio-keys", | ||
728 | .dev = { | ||
729 | .platform_data = &universal_gpio_keys_data, | ||
730 | }, | ||
731 | }; | ||
732 | |||
733 | /* eMMC */ | ||
734 | static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { | ||
735 | .max_width = 8, | ||
736 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | | ||
737 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | ||
738 | MMC_CAP_DISABLE), | ||
739 | .cd_type = S3C_SDHCI_CD_PERMANENT, | ||
740 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
741 | }; | ||
742 | |||
743 | static struct regulator_consumer_supply mmc0_supplies[] = { | ||
744 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), | ||
745 | }; | ||
746 | |||
747 | static struct regulator_init_data mmc0_fixed_voltage_init_data = { | ||
748 | .constraints = { | ||
749 | .name = "VMEM_VDD_2.8V", | ||
750 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
751 | }, | ||
752 | .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies), | ||
753 | .consumer_supplies = mmc0_supplies, | ||
754 | }; | ||
755 | |||
756 | static struct fixed_voltage_config mmc0_fixed_voltage_config = { | ||
757 | .supply_name = "MASSMEMORY_EN", | ||
758 | .microvolts = 2800000, | ||
759 | .gpio = EXYNOS4_GPE1(3), | ||
760 | .enable_high = true, | ||
761 | .init_data = &mmc0_fixed_voltage_init_data, | ||
762 | }; | ||
763 | |||
764 | static struct platform_device mmc0_fixed_voltage = { | ||
765 | .name = "reg-fixed-voltage", | ||
766 | .id = FIXED_REG_ID_MMC0, | ||
767 | .dev = { | ||
768 | .platform_data = &mmc0_fixed_voltage_config, | ||
769 | }, | ||
770 | }; | ||
771 | |||
772 | /* SD */ | ||
773 | static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = { | ||
774 | .max_width = 4, | ||
775 | .host_caps = MMC_CAP_4_BIT_DATA | | ||
776 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | ||
777 | MMC_CAP_DISABLE, | ||
778 | .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */ | ||
779 | .ext_cd_gpio_invert = 1, | ||
780 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
781 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
782 | }; | ||
783 | |||
784 | /* WiFi */ | ||
785 | static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = { | ||
786 | .max_width = 4, | ||
787 | .host_caps = MMC_CAP_4_BIT_DATA | | ||
788 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | ||
789 | MMC_CAP_DISABLE, | ||
790 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | ||
791 | }; | ||
792 | |||
793 | static void __init universal_sdhci_init(void) | ||
794 | { | ||
795 | s3c_sdhci0_set_platdata(&universal_hsmmc0_data); | ||
796 | s3c_sdhci2_set_platdata(&universal_hsmmc2_data); | ||
797 | s3c_sdhci3_set_platdata(&universal_hsmmc3_data); | ||
798 | } | ||
799 | |||
800 | /* I2C1 */ | ||
801 | static struct i2c_board_info i2c1_devs[] __initdata = { | ||
802 | /* Gyro, To be updated */ | ||
803 | }; | ||
804 | |||
805 | /* Frame Buffer */ | ||
806 | static struct s3c_fb_pd_win universal_fb_win0 = { | ||
807 | .win_mode = { | ||
808 | .left_margin = 16, | ||
809 | .right_margin = 16, | ||
810 | .upper_margin = 2, | ||
811 | .lower_margin = 28, | ||
812 | .hsync_len = 2, | ||
813 | .vsync_len = 1, | ||
814 | .xres = 480, | ||
815 | .yres = 800, | ||
816 | .refresh = 55, | ||
817 | }, | ||
818 | .max_bpp = 32, | ||
819 | .default_bpp = 16, | ||
820 | }; | ||
821 | |||
822 | static struct s3c_fb_platdata universal_lcd_pdata __initdata = { | ||
823 | .win[0] = &universal_fb_win0, | ||
824 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | | ||
825 | VIDCON0_CLKSEL_LCD, | ||
826 | .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN | ||
827 | | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
828 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
829 | }; | ||
830 | |||
831 | static struct regulator_consumer_supply cam_i_core_supply = | ||
832 | REGULATOR_SUPPLY("core", "0-001f"); | ||
833 | |||
834 | static struct regulator_init_data cam_i_core_reg_init_data = { | ||
835 | .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, | ||
836 | .num_consumer_supplies = 1, | ||
837 | .consumer_supplies = &cam_i_core_supply, | ||
838 | }; | ||
839 | |||
840 | static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = { | ||
841 | .supply_name = "CAM_I_CORE_1.2V", | ||
842 | .microvolts = 1200000, | ||
843 | .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */ | ||
844 | .enable_high = 1, | ||
845 | .init_data = &cam_i_core_reg_init_data, | ||
846 | }; | ||
847 | |||
848 | static struct platform_device cam_i_core_fixed_reg_dev = { | ||
849 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE, | ||
850 | .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg }, | ||
851 | }; | ||
852 | |||
853 | static struct regulator_consumer_supply cam_s_if_supply = | ||
854 | REGULATOR_SUPPLY("d_sensor", "0-001f"); | ||
855 | |||
856 | static struct regulator_init_data cam_s_if_reg_init_data = { | ||
857 | .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, | ||
858 | .num_consumer_supplies = 1, | ||
859 | .consumer_supplies = &cam_s_if_supply, | ||
860 | }; | ||
861 | |||
862 | static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = { | ||
863 | .supply_name = "CAM_S_IF_1.8V", | ||
864 | .microvolts = 1800000, | ||
865 | .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */ | ||
866 | .enable_high = 1, | ||
867 | .init_data = &cam_s_if_reg_init_data, | ||
868 | }; | ||
869 | |||
870 | static struct platform_device cam_s_if_fixed_reg_dev = { | ||
871 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF, | ||
872 | .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg }, | ||
873 | }; | ||
874 | |||
875 | static struct s5p_platform_mipi_csis mipi_csis_platdata = { | ||
876 | .clk_rate = 166000000UL, | ||
877 | .lanes = 2, | ||
878 | .alignment = 32, | ||
879 | .hs_settle = 12, | ||
880 | .phy_enable = s5p_csis_phy_enable, | ||
881 | }; | ||
882 | |||
883 | #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3) | ||
884 | #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */ | ||
885 | #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5) | ||
886 | |||
887 | static int m5mols_set_power(struct device *dev, int on) | ||
888 | { | ||
889 | gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on); | ||
890 | gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on); | ||
891 | return 0; | ||
892 | } | ||
893 | |||
894 | static struct m5mols_platform_data m5mols_platdata = { | ||
895 | .gpio_reset = GPIO_CAM_MEGA_nRST, | ||
896 | .reset_polarity = 0, | ||
897 | .set_power = m5mols_set_power, | ||
898 | }; | ||
899 | |||
900 | static struct i2c_board_info m5mols_board_info = { | ||
901 | I2C_BOARD_INFO("M5MOLS", 0x1F), | ||
902 | .platform_data = &m5mols_platdata, | ||
903 | }; | ||
904 | |||
905 | static struct s5p_fimc_isp_info universal_camera_sensors[] = { | ||
906 | { | ||
907 | .mux_id = 0, | ||
908 | .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | ||
909 | V4L2_MBUS_VSYNC_ACTIVE_LOW, | ||
910 | .bus_type = FIMC_MIPI_CSI2, | ||
911 | .board_info = &m5mols_board_info, | ||
912 | .i2c_bus_num = 0, | ||
913 | .clk_frequency = 21600000UL, | ||
914 | .csi_data_align = 32, | ||
915 | }, | ||
916 | }; | ||
917 | |||
918 | static struct s5p_platform_fimc fimc_md_platdata = { | ||
919 | .isp_info = universal_camera_sensors, | ||
920 | .num_clients = ARRAY_SIZE(universal_camera_sensors), | ||
921 | }; | ||
922 | |||
923 | static struct gpio universal_camera_gpios[] = { | ||
924 | { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" }, | ||
925 | { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" }, | ||
926 | { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, | ||
927 | { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, | ||
928 | }; | ||
929 | |||
930 | static void universal_camera_init(void) | ||
931 | { | ||
932 | s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), | ||
933 | &s5p_device_mipi_csis0); | ||
934 | s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata), | ||
935 | &s5p_device_fimc_md); | ||
936 | |||
937 | if (gpio_request_array(universal_camera_gpios, | ||
938 | ARRAY_SIZE(universal_camera_gpios))) { | ||
939 | pr_err("%s: GPIO request failed\n", __func__); | ||
940 | return; | ||
941 | } | ||
942 | |||
943 | if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf))) | ||
944 | m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT); | ||
945 | else | ||
946 | pr_err("Failed to configure 8M_ISP_INT GPIO\n"); | ||
947 | |||
948 | /* Free GPIOs controlled directly by the sensor drivers. */ | ||
949 | gpio_free(GPIO_CAM_MEGA_nRST); | ||
950 | gpio_free(GPIO_CAM_8M_ISP_INT); | ||
951 | |||
952 | if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) | ||
953 | pr_err("Camera port A setup failed\n"); | ||
954 | } | ||
955 | |||
956 | static struct platform_device *universal_devices[] __initdata = { | ||
957 | /* Samsung Platform Devices */ | ||
958 | &s5p_device_mipi_csis0, | ||
959 | &s5p_device_fimc0, | ||
960 | &s5p_device_fimc1, | ||
961 | &s5p_device_fimc2, | ||
962 | &s5p_device_fimc3, | ||
963 | &mmc0_fixed_voltage, | ||
964 | &s3c_device_hsmmc0, | ||
965 | &s3c_device_hsmmc2, | ||
966 | &s3c_device_hsmmc3, | ||
967 | &s3c_device_i2c0, | ||
968 | &s3c_device_i2c3, | ||
969 | &s3c_device_i2c5, | ||
970 | &s5p_device_i2c_hdmiphy, | ||
971 | &hdmi_fixed_voltage, | ||
972 | &exynos4_device_pd[PD_TV], | ||
973 | &s5p_device_hdmi, | ||
974 | &s5p_device_sdo, | ||
975 | &s5p_device_mixer, | ||
976 | |||
977 | /* Universal Devices */ | ||
978 | &i2c_gpio12, | ||
979 | &universal_gpio_keys, | ||
980 | &s5p_device_onenand, | ||
981 | &s5p_device_fimd0, | ||
982 | &s5p_device_mfc, | ||
983 | &s5p_device_mfc_l, | ||
984 | &s5p_device_mfc_r, | ||
985 | &exynos4_device_pd[PD_MFC], | ||
986 | &exynos4_device_pd[PD_LCD0], | ||
987 | &exynos4_device_pd[PD_CAM], | ||
988 | &cam_i_core_fixed_reg_dev, | ||
989 | &cam_s_if_fixed_reg_dev, | ||
990 | &s5p_device_fimc_md, | ||
991 | }; | ||
992 | |||
993 | static void __init universal_map_io(void) | ||
994 | { | ||
995 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
996 | s3c24xx_init_clocks(24000000); | ||
997 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | ||
998 | } | ||
999 | |||
1000 | void s5p_tv_setup(void) | ||
1001 | { | ||
1002 | /* direct HPD to HDMI chip */ | ||
1003 | gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); | ||
1004 | |||
1005 | gpio_direction_input(EXYNOS4_GPX3(7)); | ||
1006 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | ||
1007 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | ||
1008 | |||
1009 | /* setup dependencies between TV devices */ | ||
1010 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1011 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1012 | } | ||
1013 | |||
1014 | static void __init universal_reserve(void) | ||
1015 | { | ||
1016 | s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); | ||
1017 | } | ||
1018 | |||
1019 | static void __init universal_machine_init(void) | ||
1020 | { | ||
1021 | universal_sdhci_init(); | ||
1022 | s5p_tv_setup(); | ||
1023 | |||
1024 | s3c_i2c0_set_platdata(&universal_i2c0_platdata); | ||
1025 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); | ||
1026 | |||
1027 | universal_tsp_init(); | ||
1028 | s3c_i2c3_set_platdata(NULL); | ||
1029 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); | ||
1030 | |||
1031 | s3c_i2c5_set_platdata(NULL); | ||
1032 | s5p_i2c_hdmiphy_set_platdata(NULL); | ||
1033 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); | ||
1034 | |||
1035 | s5p_fimd0_set_platdata(&universal_lcd_pdata); | ||
1036 | |||
1037 | universal_touchkey_init(); | ||
1038 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, | ||
1039 | ARRAY_SIZE(i2c_gpio12_devs)); | ||
1040 | |||
1041 | universal_camera_init(); | ||
1042 | |||
1043 | /* Last */ | ||
1044 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); | ||
1045 | |||
1046 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
1047 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
1048 | |||
1049 | s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1050 | s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1051 | s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1052 | s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1053 | s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1054 | } | ||
1055 | |||
1056 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | ||
1057 | /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ | ||
1058 | .atag_offset = 0x100, | ||
1059 | .init_irq = exynos4_init_irq, | ||
1060 | .map_io = universal_map_io, | ||
1061 | .init_machine = universal_machine_init, | ||
1062 | .timer = &exynos4_timer, | ||
1063 | .reserve = &universal_reserve, | ||
1064 | MACHINE_END | ||